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参数资料
| 型号： | ST7PLITEUS5U3TR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, DSO8 |
| 封装： | LEAD FREE, DFN-8 |
| 文件页数： | 31/108页 |
| 文件大小： | 1957K |
| 代理商： | ST7PLITEUS5U3TR |
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SYSTEM INTEGRITY MANAGEMENT (Cont’d)
Figure 16. Reset and Supply Management Block Diagram
7.4.2 Auxiliary Voltage Detector (AVD)
The Voltage Detector function (AVD) is based on
an analog comparison between a VIT-(AVD) and
VIT+(AVD) reference value and the VDD main sup-
ply voltage (VAVD). The VIT-(AVD) reference value
for falling voltage is lower than the VIT+(AVD) refer-
ence value for rising voltage in order to avoid par-
asitic detection (hysteresis).
The output of the AVD comparator is directly read-
able by the application software through a real
time status bit (AVDF) in the SICSR register. This
bit is read only.
7.4.2.1 Monitoring the VDD Main Supply.
The AVD threshold is selected by the AVD[1:0]
bits in the AVDTHCR register.
If the AVD interrupt is enabled, an interrupt is gen-
erated when the voltage crosses the VIT+(AVD) or
VIT-(AVD) threshold (AVDF bit is set).
In the case of a drop in voltage, the AVD interrupt
acts as an early warning, allowing software to shut
down safely before the LVD resets the microcon-
troller. See Figure 17.
The interrupt on the rising edge is used to inform
the application that the VDD warning state is over
Note: Make sure the right combination of LVD and
AVD thresholds is used as LVD and AVD levels
are not correlated. Refer to section 12.3.2 on page
70 and section 12.3.3 on page 70 for more details.
LOW VOLTAGE
DETECTOR
(LVD)
AUXILIARY VOLTAGE
DETECTOR
(AVD)
RESET
VSS
VDD
RESET SEQUENCE
MANAGER
(RSM)
AVD Interrupt Request
SYSTEM INTEGRITY MANAGEMENT
WATCHDOG
SICSR
TIMER (WDG)
AVD
LVD
RF
IE
0
F
0
STATUS FLAG
1
7
0
1
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| ST7PMC1K2T3 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI? |
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