MPC5634M Microcontroller Data Sheet, Rev. 9
Overview
Freescale Semiconductor
24
Independent interrupt source for each channel
Counter can be stopped in debug mode
2.2.19
Software Watchdog Timer (SWT)
The Software Watchdog Timer (SWT) is a second watchdog module to complement the standard Power Architecture watchdog
integrated in the CPU core. The SWT is a 32-bit modulus counter, clocked by the system clock or the crystal clock, that can
provide a system reset or interrupt request when the correct software key is not written within the required time window.
The following features are implemented:
32-bit modulus counter
Clocked by system clock or crystal clock
Optional programmable watchdog window mode
Can optionally cause system reset or interrupt request on timeout
Reset by writing a software key to memory mapped register
Enabled out of reset
Configuration is protected by a software key or a write-once register
2.2.20
Debug features
2.2.20.1
Nexus port controller
The NPC (Nexus Port Controller) block provides real-time development support capabilities for the MPC5634MPower
Architecture-based MCU in compliance with the IEEE-ISTO 5001-2003 standard. This development support is supplied for
MCUs without requiring external address and data pins for internal visibility. The NPC block is an integration of several
individual Nexus blocks that are selected to provide the development support interface for MPC5634M. The NPC block
interfaces to the host processor (e200z335), eTPU, and internal buses to provide development support as per the IEEE-ISTO
5001-2003 standard. The development support provided includes program trace and run-time access to the MCUs internal
memory map and access to the Power Architecture and eTPU internal registers during halt. The Nexus interface also supports
a JTAG only mode using only the JTAG pins. MPC5634Min the production 144 LQFP supports a 3.3 V reduced (4-bit wide)
Auxiliary port. These Nexus port pins can also be used as 5 V I/O signals to increase usable I/O count of the device. When using
this Nexus port as IO, Nexus trace is still possible using VertiCal calibration. In the VertiCal calibration package, the full 12-bit
Auxiliary port is available.
NOTE
In the VertiCal package, the full Nexus Auxiliary port shares balls with the addresses of the
calibration bus. Therefore multiplexed address/data bus mode must be used for the
calibration bus when using full width Nexus trace in VertiCal assembly.
The following features are implemented:
5-pin JTAG port (JCOMP, TDI, TDO, TMS, and TCK)
— Always available in production package
— Supports both JTAG Boundary Scan and debug modes
— 3.3 V interface
— Supports Nexus class 1 features
— Supports Nexus class 3 read/write feature
9-pin Reduced Port interface in 144 LQFP production package
— Alternate function as IO
— 5 V (in GPIO or alternate function mode), 3.3 V (in Nexus mode) interface