- 您现在的位置：买卖IC网 > PDF目录199494 > TSPC603RMAB/Q6LC 32-BIT, 166 MHz, RISC PROCESSOR, CQFP240 PDF资料下载
参数资料
| 型号： | TSPC603RMAB/Q6LC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 166 MHz, RISC PROCESSOR, CQFP240 |
| 封装： | CERQUAD-240 |
| 文件页数： | 31/40页 |
| 文件大小： | 670K |
| 代理商： | TSPC603RMAB/Q6LC |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页当前第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页
TSPC603r
in CERQUAD and MQUAD Packages
37/40
10. SYSTEM DESIGN INFORMATION
10.1. PLL Power Supply Filtering
The AVdd power signal is provided on the 603e to provide power to the clock generation phase–locked loop. To ensure stability of the
internal clock, the power supplied to the AVdd input signal should be filtered using a circuit similar to the one shown in Figure 17. The
circuit should be placed as close to the AVdd pin to ensure it filters out as much noise as possible. The 0.1
mF capacitor should be
closest to the AVdd pin, followed by the 10
mF capacitor, and finally the 10 W resistor to Vdd. These traces should be kept short and
direct.
Vdd
AVdd
0.1
mF
10 mF
GND
10
W
Figure 14 : PLL Power Supply Filter Circuit
10.2. Decoupling Recommendations
Due to the 603e’s dynamic power management feature, large address and data buses, and high operating frequencies, the 603e can
generate transient power surges and high frequency noise in its power supply, especially while driving large capacitive loads. This
noise must be prevented from reaching other components in the 603e system, and the 603e itself requires a clean, tightly regulated
source of power. Therefore, it is recommended that the system designer place at least one decoupling capacitor at each Vdd and
OVdd pin of the 603e. It is also recommended that these decoupling capacitors receive their power from separate Vdd, OVdd, and
GND power planes in the PCB, utilizing short traces to minimize inductance.
These capacitors should vary in value from 220 pF to 10
mF to provide both high–and low–frequency filtering, and should be placed as
close as possible to their associated Vdd or OVdd pin. Suggested values for the Vdd pins 220 pF (ceramic), 0,01
mF (ceramic) and 0,1
mf (ceramic). Suggested values for the OVdd pins 0,01 mF (ceramic), 0,1 mF (ceramic), and 10 mF(tantalum).OnlySMT(surfacemount
technology) capacitors should be used to minimize lead inductance.
In addition, it is recommended that there be several bulk storage capacitors distributed around the PCB, feeding the Vdd and OVdd
planes, to enable quick recharging of the smaller chip capacitors. These bulk capacitors should also have a low ESR (equivalent
series resistance) rating to ensure the quick response time necessary. They should also be connected to the power and ground
planes through two vias to minimize inductance. Suggested bulk capacitors 100
mF (AVX TPS tantalum) or 330 mf (AVX TPS tanta-
lum).
10.3. Connection Recommendations
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal level. Unused active low
inputs should be tied to Vdd. Unused active high inputs should be connected to GND. ALL NC (no–connect) signals must remain
unconnected.
Power and ground connections must be made to all external Vdd, OVdd, and GND pins of the 603e.
10.4. Pull–up Resistor Requirements
The 603e requires high–resistive (weak : 10 K
W) pull–up resistors on several control signals of the bus interface to maintain the con-
trol signals in the negated state after they have been actively negated and released by the 603e or other bus master. These signals
are –TS, ABB, DBB, and ARTRY.
In addition, the 603e has three open–drain style outputs that require pull–up resistors (weak or stronger : 4.7 K
W–10 KW) if they are
used by the system. These signals are – APE, DPE, and CKSTP_OUT.
During inactive periods on the bus, the address and transfer attributes on the bus are not driven by any master and may float in the
high–impedance state for relatively long periods of time. Since the 603e must continually monitor these signals for snooping, this float
condition may cause excessive power draw by the input revivers on the 603e. It is recommended that these signals be pulled up
trough weak (10 K
W) pull–up resistors or restored in some manner by the system. The snooped address and transfer attribute inputs
are – A
0–3], AP[0–3], TT[0–4], TBST, and GBL.
The data bus input receivers are normally turned off when no read operation is in progress and do not require pull–up resistors on the
data bus.
相关PDF资料 |
PDF描述 |
|---|---|
| TSPC860MHVGB/Q40B | 32-BIT, 40 MHz, MICROPROCESSOR, CBGA357 |
| TSPC860MHMZPB/Q40B | 32-BIT, 40 MHz, MICROPROCESSOR, PBGA357 |
| TS(X)PC860MHMZPU40B | 32-BIT, 40 MHz, MICROPROCESSOR, PBGA357 |
| TS(X)PC860MHMZPU/T50B | 32-BIT, 50 MHz, MICROPROCESSOR, PBGA357 |
| TS(X)PC860MHMZPB/Q50B | 32-BIT, 50 MHz, MICROPROCESSOR, PBGA357 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TSPC603RMG10LC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
| TSPC603RMG12LC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
| TSPC603RMG14LC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
| TSPC603RMG6LC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
| TSPC603RMG8LC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
发布紧急采购，3分钟左右您将得到回复。