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| 型号： | W989D2CBJX6E |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, 5.4 ns, PBGA90 |
| 封装： | 8 X 13 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-90 |
| 文件页数： | 45/67页 |
| 文件大小： | 1469K |
| 代理商： | W989D2CBJX6E |
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W989D6CB / W989D2CB
512Mb Mobile LPSDR
Publication Release Date: Jun, 27, 2011
- 5 -
Revision A01-004
4. PIN DESCRIPTION
4.1 Signal Description
BALL NAME
FUNCTION
DESCRIPTION
A [n : 0]
Address
Multiplexed pins for row and column address.
A10 is Auto Precharge Select
BA0, BA1
Bank Select
Select bank to activate during row address latch time, or bank to
read/write during address latch time.
DQ0~DQ15 (×16)
DQ0~DQ31 (×32)
Data Input/ Output Multiplexed pins for data output and input.
CS
Chip Select
Disable or enable the command decoder. When command
decoder is disabled, new command is ignored and previous
operation continues.
RAS
Row
Address Strobe
Command input. When sampled at the rising edge of the clock,
RAS , CAS and
WE define the operation to be executed.
CAS
Column
Address Strobe
Referred to RAS
WE
Write Enable
Referred to
WE
UDQM / LDQM(x16)
DQM0 ~ DQM3 (x32)
I/O Mask
The output buffer is placed at Hi-Z (with latency of 2 in CL=2, 3;)
when DQM is sampled high in read cycle. In write cycle, sampling
DQM high will block the write operation with zero latency.
CLK
Clock Inputs
System clock used to sample inputs on the rising edge of clock.
CKE
Clock Enable
CKE controls the clock activation and deactivation. When CKE is
low, Power Down mode, Suspend mode or Self Refresh mode is
entered.
VDD
Power
Power supply for input buffers and logic circuit inside DRAM.
VSS
Ground
Ground for input buffers and logic circuit inside DRAM.
VDDQ
Power for I/O
Buffer
Power supply separated from VDD, used for output buffers to
improve noise.
VSSQ
Ground for
I/O Buffer
Separated ground from VSS, used for output buffers to improve
noise.
NC
No Connection
No connection
4.2 Addressing Table
ITEM
512 Mb
Number of banks
4
Bank address pins
BA0,BA1
Auto precharge pin
A10/AP
X16
Row addresses
A0-A12
Column addresses
A0-A9
Refresh count
8K
x32
Row addresses
A0-A12
Column addresses
A0-A8
Refresh count
8K
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| WAC-011-A | TRANSCEIVER, PQFP100 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W989D2CBJX6I | 制造商:WINBOND 制造商全称:Winbond 功能描述:512Mb Mobile LPSDR |
| W989D2CBJX7E | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPSDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W989D2CBJX7G | 制造商:WINBOND 制造商全称:Winbond 功能描述:512Mb Mobile LPSDR |
| W989D2KBJX6E | 制造商:Winbond Electronics Corp 功能描述:IC LPSDR SDRAM 512MBIT 90VFBGA |
| W989D2KBJX6I | 制造商:Winbond Electronics Corp 功能描述:IC LPSDR SDRAM 512MBIT 90VFBGA |
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