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参数资料
| 型号： | W989D2CBJX6E |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, 5.4 ns, PBGA90 |
| 封装： | 8 X 13 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-90 |
| 文件页数： | 9/67页 |
| 文件大小： | 1469K |
| 代理商： | W989D2CBJX6E |
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W989D6CB / W989D2CB
512Mb Mobile LPSDR
Publication Release Date: Jun, 27, 2011
- 17 -
Revision A01-004
Current State
CS
RAS
CAS
WE
Address
Command
Action
Notes
Write
recovering
H
X
DSL
Nop
→ Maintain Row active after tWR
L
H
X
NOP
Nop
→ Maintain Row active after tWR
L
H
L
X
BST
Nop
→ Maintain Row active after tWR
L
H
L
H
BS, CA, A10
READ/READA
Begin Read
7
L
H
L
BS, CA, A10
WRIT/WRITA
Begin new Write
L
H
BS, RA
ACT
ILLEGAL
3
L
H
L
BS, A10
PRE/PREA
ILLEGAL
3
L
H
X
AREF/SELF
ILLEGAL
L
Op-Code
MRS/EMRS
ILLEGAL
Write
recovering
with auto
precharge
H
X
DSL
Nop
→ Enter precharge after tWR
L
H
X
NOP
Nop
→ Enter precharge after tWR
L
H
L
X
BST
Nop
→ Enter precharge after tWR
L
H
L
H
BS, CA, A10
READ/READA
ILLEGAL
3
L
H
L
BS, CA, A10
WRIT/WRITA
ILLEGAL
3
L
H
BS, RA
ACT
ILLEGAL
3
L
H
L
BS, A10
PRE/PREA
ILLEGAL
3
L
H
X
AREF/SELF
ILLEGAL
L
Op-Code
MRS/EMRS
ILLEGAL
Refreshing
H
X
DSL
Nop
→ Idle after tRFC
L
H
X
NOP
Nop
→ Idle after tRFC
L
H
L
X
BST
Nop
→ Idle after tRFC
L
H
L
X
READ/WRIT
ILLEGAL
L
H
X
ACT/PRE/PREA
ILLEGAL
L
X
AREF/SELF/MRS/
EMRS
ILLEGAL
Mode register
accessing
H
X
DSL
Nop
→ Idle after tRSC
L
H
X
NOP
Nop
→ Idle after tRSC
L
H
L
X
BST
ILLEGAL
L
H
L
X
READ/WRIT
ILLEGAL
L
X
ACT/PRE/PREA/
AREF/SELF/MRS/
EMRS
ILLEGAL
Note:
1.
All entries assume that CKE was active (High level) during the preceding clock cycle and the current clock cycle (CKEn-
1 = CKEn = ”1”)
2.
Illegal if any bank is not idle.
3.
Illegal to bank in specified states; Function may be legal in the bank indicated by Bank Address (BS), depending on the state of that bank.
4.
Illegal if tRCD is not satisfied.
5.
Illegal if tRAS is not satisfied.
6.
Must satisfy burst interrupt condition.
7.
Must avoid bus contention, bus turn around, and/or satisfy write recovery requirements.
8.
Must mask pr
eceding data which don’t satisfy tWR.
Remark: H = High level, L = Low level, X = High or Low level (Don’t care), V = Valid data.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W989D2CBJX6I | 制造商:WINBOND 制造商全称:Winbond 功能描述:512Mb Mobile LPSDR |
| W989D2CBJX7E | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPSDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W989D2CBJX7G | 制造商:WINBOND 制造商全称:Winbond 功能描述:512Mb Mobile LPSDR |
| W989D2KBJX6E | 制造商:Winbond Electronics Corp 功能描述:IC LPSDR SDRAM 512MBIT 90VFBGA |
| W989D2KBJX6I | 制造商:Winbond Electronics Corp 功能描述:IC LPSDR SDRAM 512MBIT 90VFBGA |
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