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参数资料
| 型号： | WBLXT975BHCA8 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP160 |
| 封装： | ROHS COMPLIANT, PLASTIC, MS-002DD-1, HQFP-160 |
| 文件页数： | 61/76页 |
| 文件大小： | 1004K |
| 代理商： | WBLXT975BHCA8 |
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LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers
64
Datasheet
Table 44. Control Register
Bit
Name
Description
Type 1
Default
0.15
Reset
1 = Reset port.
0 = Enable normal operation.
R/W
SC
0
0.14
Loopback
1 = Enable loopback mode.
0 = Disable loopback mode.
R/W
0
0.13
Speed
Selection
1 = 100 Mbps.
0 = 10 Mbps.
R/W
Note 2
0.12
Auto-Negotiation
Enable
1 = Enable auto-negotiate process (overrides speed select and
duplex mode bits).
0 = Disable auto-negotiate process.
R/W
Note 3
0.11
Power Down
1 = Enable power down.
0 = Enable normal operation.
R/W
Note 4
0.10
Isolate
1 = Electrically isolate port from MII.
0 = Normal operation.
R/W
Note 5
0.9
Restart Auto-
Negotiation
1 = Restart auto-negotiation process.
0 = Normal operation.
R/W
SC
Note 6
0.8
Duplex Mode
1 = Enable full-duplex.
0 = Enable half-duplex.
R/W
Note 7
0.7
Collision Test
1 = Enable COL signal test.
0 = Disable COL signal test.
R/W
Note 8
0.6:4
Transceiver Test
Mode
Not supported.
RO
0
0.3
Master-Slave
Enable
Not supported.
RO
0
0.2
Master-Slave Value
Not supported.
RO
0
0.1:0
Reserved
Write as 0; ignore on read.
R/W
N/A
1. R/W = Read/Write
RO = Read Only
SC = Self Clearing
2. If auto-negotiation is enabled, this bit is ignored. If auto-negotiation is disabled, the default value of bit 0.13 is determined by
CFG_0.
3. If SD_TXn is tied High or to a 5V PECL input (FX Mode), the default value of bit 0.12 = 0. If SD_TXn is tied Low (TP Mode),
the default value of bit 0.12 is determined by AUTOENA.
4. The LXT974/975 internally holds all set values of the configuration registers upon exiting power down mode. A delay of 500
ns minimum is required from the time power down is cleared until any register can be written.
5. The default value of bit 0.10 is determined by pin TRSTEn.
6. If auto-negotiation is enabled, the default value of bit 0.9 is determined by CFG_0.
If auto-negotiation is disabled, the bit is ignored.
7. If auto-negotiation is enabled, this bit is ignored. If auto-negotiation is disabled and the port is operating in TX mode, the
default value of bit 0.8 is determined by pin FDE. If auto-negotiation is disabled and the port is operating in FX mode, the
default value of bit 0.8 is determined by pin FDE_FX.
8. This bit is ignored unless loopback is enabled (bit 0.14 = 1).
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相关代理商/技术参数 |
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| WBLXT9785EHC.D0865110 | 功能描述:IC TXRX 8PORT ETHERNET 208-HQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR) |
| WBLXT9785EHC.D0-865110 | 制造商:Cortina Systems Inc 功能描述:PHY 8-CH 10Mbps/100Mbps 208-Pin PQFP |
| WBLXT9785EHC.D0-865111 | 制造商:Cortina Systems Inc 功能描述:PHY 8-CH 10Mbps/100Mbps 208-Pin PQFP |
| WBLXT9785HC.D0 | 功能描述:IC TXRX 8PORT ETHERNET 208-HQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR) |
| WBLXT9785HC.D0-865112 | 功能描述:TXRX ETH OCT LP COMM 208-HQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:收发器 驱动器/接收器数:1/1 规程:RS422，RS485 电源电压:4.75 V ~ 5.25 V 安装类型:通孔 封装/外壳:8-DIP（0.300"，7.62mm） 供应商设备封装:8-PDIP 包装:管件 产品目录页面:1402 (CN2011-ZH PDF) |
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