
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
114
Datasheet
Document Number: 249241
Revision Number: 010
Revision Date: 30-May-2006
AVSS
E11, F9, F10,
F11, G9, G10,
G11, H9, H10,
H11, J9, J10,
J11, K11, L11
–
Analog Ground.
Ground return for analog supply (AVCC). all grounds can
be tied together using a single ground plane.
VCCD
D7, L7
–
Digital Power Supply - Core.
+2.5 V supply for core digital circuits.
VCCIO
D4, F4, H4,
L3, L5,
–
Digital Power Supply - I/O Ring.
+2.5/3.3 V supply for digital I/O circuits. The digital input
circuits running off of this rail, having a TTL-level threshold
and over-voltage protection, may be interfaced with 3.3/5.0
V, when the IO supply is 3.3 V, and 2.5/3.3/5.0 V when 2.5
V.
GNDD
A1, A2, A3,
B1, B2, B5,
B10, D9, D11,
E5, E6, E9,
E10, F5, F6,
F7, F8, G4,
G6, G7, G8,
H6, H7, H8,
J5, J6, J7, J8,
K5, K6, K9,
K10, L2, N1,
N11, P1, P11
–
Digital Ground.
Ground return for core digital supplies (VCCD). All ground
pins can be tied together using a single ground plane.
SGND
C8
–
Substrate Ground.
Ground for chip substrate. All ground pins can be tied
together using a single ground plane.
Unused/Reserved Balls
NC
C4, D1, D2,
D10, E4, E7,
G2, G5, H1,
H5, J4, K4,
K7, L1, L6,
L10, M4, M5,
P2, P3
–
No Connection.
Table 39. Intel
LXT9785 BGA15 Signal Descriptions (Sheet 7 of 7)
Symbol
BGA15 Ball
Designation
Type
Signal Description
1. Type Column Coding: I = Input, O = Output, OD = Open Drain output, ST = Schmitt Triggered input, TS =
Three-State-able output, SL = Slew-rate Limited output, IP = weak Internal Pull-up, ID = weak Internal pull-
Down.