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| 型号： | WJLXT971ALE.A4-857346 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 39/80页 |
| 文件大小： | 931K |
| 代理商： | WJLXT971ALE.A4-857346 |
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Page 44
Cortina Systems LXT972A Single-Port 10/100 Mbps PHY Transceiver
LXT972A PHY
Datasheet
249186, Revision 5.2
13 September 2007
5.9 Monitoring Operations
5.9.2
Monitoring Next Page Exchange
The LXT972A PHY offers an Alternate Next Page mode to simplify the next page
exchange process. Normally, register bit 6.1 (Page Received) remains set until read.
When Alternate Next Page mode is enabled, register bit 6.1 is automatically cleared
whenever a new negotiation process takes place. This action prevents the user from
reading an old value in bit 6.1 and assuming that Registers 5 and 8 (Partner Ability)
contain valid information. Additionally, the LXT972A PHY uses register bit 6.5 to indicate
when the current received page is the base page. This information is useful for
recognizing when next pages must be resent due to a new negotiation process starting.
register bits 6.1 and 6.5 are cleared when read.
5.9.3
LED Functions
The LXT972A PHY has these direct LED driver pins: LED1/CFG1, LED2/CFG2, and
LED3/CFG3.
On power-up, all the drivers are asserted for approximately 1 second after reset de-
asserts. Each LED driver can be programmed using the LED Configuration Register
(Table 53, LED Configuration Register - Address 20, Hex 14, on page 76) to indicate one
of the following conditions:
Collision Condition
Duplex Mode
Link Status
Operating Speed
Receive Activity
Transmit Activity
The LED drivers can also be programmed to display various combined status conditions.
For example, setting register bits 20.15:12 to ‘1101’ produces the following combination of
Link and Activity indications:
If Link is down, LED is off. If activity is detected from the MAC, the LED still blinks
even if the link is down.
If Link is up, LED is on.
If Link is up and activity is detected, the LED blinks at the stretch interval selected by
register bits 20.3:2 and continues to blink as long as activity is present.
The LXT972A PHY LED driver pins also provide initial configuration settings. The LED
pins are sensitive to polarity and automatically pull up or pull down to configure for either
open drain or open collector circuits (10 mA Max current rating) as required by the
hardware configuration. For details, see the discussion of Section 5.4.4, Hardware
5.9.4
LED Pulse Stretching
The LED Configuration Register also provides optional LED pulse stretching to 30, 60, or
100 ms. The pulse stretch time is extended further if the event occurs again during this
pulse stretch period.
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| WJLXT972ALC.A4-857341 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT972ALC.A4-857345 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
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| WJLXT971ALC.A4SE001 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
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