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| 型号： | WJLXT971ALE.A4-857346 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 40/80页 |
| 文件大小： | 931K |
| 代理商： | WJLXT971ALE.A4-857346 |
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Page 45
Cortina Systems LXT972A Single-Port 10/100 Mbps PHY Transceiver
LXT972A PHY
Datasheet
249186, Revision 5.2
13 September 2007
5.10 Boundary Scan (JTAG
1149.1) Functions
When an event such as receiving a packet occurs, the event is edge detected and it starts
the stretch timer. The LED driver remains asserted until the stretch timer expires. If
another event occurs before the stretch timer expires, then the stretch timer is reset and
the stretch time is extended.
When a long event (such as duplex status) occurs, the event is edge detected and it starts
the stretch timer. When the stretch timer expires, the edge detector is reset so that a long
event causes another pulse to be generated from the edge detector, which resets the
stretch timer and causes the LED driver to remain asserted.
Figure 18 shows how the stretch operation functions.
5.10
Boundary Scan (JTAG 1149.1) Functions
The LXT972A PHY includes a IEEE 1149.1 boundary scan test port for board level
testing. All digital input, output, and input/output pins are accessible.
Note:
5.10.1
Boundary Scan Interface
The boundary scan interface consists of five pins (TMS, TDI, TDO, TRST_L, and TCK). It
includes a state machine, data register array, and instruction register. The TMS and TDI
pins are pulled up internally. TCK is pulled down internally. TDO does not have an internal
pull-up or pull-down.
5.10.2
State Machine
The TAP controller is a state machine, with 16 states driven by the TCK and TMS pins.
Upon reset, the TEST_LOGIC_RESET state is entered. The state machine is also reset
when TMS and TDI are high for five TCK periods.
5.10.3
Instruction Register
After the state machine resets, the IDCODE instruction is always invoked. The decode
logic ensures the correct data flow to the Data registers according to the current
instruction.
Table 16 lists valid LXT972A PHY JTAG instructions.
Figure 18
LED Pulse Stretching
Event
LED
Note: The direct drive LED outputs in this diagram are shown as active Low.
stretch
B3475-01
相关PDF资料 |
PDF描述 |
|---|---|
| WJLXT972ALC.A4-857341 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT972ALC.A4-857345 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALC.A4SE000 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALC.A4SE001 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALE.A4SE000 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
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| WJLXT972ALC.A4 | 功能描述:IC TRANS 3.3V ETHERNET 64-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:25 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:4.5 V ~ 5.5 V 安装类型:通孔 封装/外壳:16-DIP（0.300"，7.62mm） 供应商设备封装:16-PDIP 包装:管件 |
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