参数资料
型号: XA3S1400A-4FGG484I
厂商: Xilinx Inc
文件页数: 22/57页
文件大小: 0K
描述: IC FPGA SPARTAN3A 1400K 484-FBGA
标准包装: 60
系列: Spartan®-3A XA
LAB/CLB数: 2816
逻辑元件/单元数: 25344
RAM 位总计: 589824
输入/输出数: 375
门数: 1400000
电源电压: 1.14 V ~ 1.26 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 484-BBGA
供应商设备封装: 484-FBGA
XA Spartan-3A Automotive FPGA Family Data Sheet
DS681 (v2.0) April 22, 2011
Product Specification
29
Timing Measurement Methodology
When measuring timing parameters at the programmable I/Os, different signal standards call for different test conditions.
Table 26 lists the conditions to use for each standard.
The method for measuring Input timing is as follows: A signal that swings between a Low logic level of VL and a High logic
level of VH is applied to the Input under test. Some standards also require the application of a bias voltage to the VREF pins
of a given bank to properly set the input-switching threshold. The measurement point of the Input signal (VM) is commonly
located halfway between VL and VH.
The Output test setup is shown in Figure 9. A termination voltage VT is applied to the termination resistor RT, the other end
of which is connected to the Output. For each standard, RT and VT generally take on the standard values recommended for
minimizing signal reflections. If the standard does not ordinarily use terminations (for example, LVCMOS, LVTTL), then RT
is set to 1 M
to indicate an open connection, and V
T is set to zero. The same measurement point (VM) that was used at the
Input is also used at the Output.
X-Ref Target - Figure 9
Figure 9: Output Test Setup
FPGA Output
VT (VREF)
RT (RREF)
VM (VMEAS)
CL (CREF)
DS681_08_041111
Notes:
1.
The names shown in parentheses are
used in the IBIS file.
相关PDF资料
PDF描述
ASM28DTAD CONN EDGECARD 56POS R/A .156 SLD
XA3S1600E-4FG400I IC FPGA SPARTAN-3E 400FGBGA
XA3S1600E-4FGG400I IC FPGA SPARTAN-3E 1600K 400FBGA
ACB91DHRR-S621 CONN EDGECARD EXTEND 182POS .050
ABB91DHRR-S621 CONN EDGECARD EXTEND 182POS .050
相关代理商/技术参数
参数描述
XA3S1400A-4FGG484Q 功能描述:IC FPGA SPARTAN3A 1400K 484-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-3A XA 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA,FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XA3S1500-4FGG456I 功能描述:IC FPGA SPARTAN-3 1.5M 456-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-3 XA 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA,FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XA3S1500-4FGG676I 功能描述:IC FPGA SPARTAN-3 1.5M 676-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-3 XA 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA,FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XA3S1600E-4FG400I 功能描述:IC FPGA SPARTAN-3E 400FGBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-3E XA 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA,FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XA3S1600E-4FGG400I 功能描述:IC FPGA SPARTAN-3E 1600K 400FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-3E XA 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA,FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5