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| 型号： | XC5204-6PQ240C |
| 厂商： | Xilinx, Inc. |
| 英文描述： | Field Programmable Gate Arrays |
| 中文描述： | 现场可编程门阵列 |
| 文件页数： | 41/73页 |
| 文件大小： | 598K |
| 代理商： | XC5204-6PQ240C |
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R
XC5200 Series Field Programmable Gate Arrays
7-128
November 5, 1998 (Version 5.2)
XC5200 Global Buffer Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from benchmark
timing patterns. The following guidelines reflect worst-case values over the recommended operating conditions. For more
detailed, more precise, and more up-to-date timing information, use the values provided by the timing calculator and used
in the simulator.
XC5200 Longline Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from benchmark
timing patterns. The following guidelines reflect worst-case values over the recommended operating conditions. For more
detailed, more precise, and more up-to-date timing information, use the values provided by the timing calculator and used
in the simulator.
Speed Grade
-6-5-4-3
Description
Symbol
Device
Max
(ns)
Max
(ns)
Max
(ns)
Max
(ns)
Global Signal Distribution
From pad through global buffer, to any clock (CK)
T
BUFG
XC5202
9.1
8.5
8.0
6.9
XC5204
9.3
8.7
8.2
7.6
XC5206
9.4
8.8
8.3
7.7
XC5210
9.4
8.8
8.5
7.7
XC5215
10.5
9.9
9.8
9.6
Speed Grade
-6
-5
-4
-3
Description
Symbol
Device
Max
(ns)
Max
(ns)
Max
(ns)
Max
(ns)
TBUF driving a Longline
I to Longline, while TS is Low; i.e., buffer is constantly ac-
tive
T
IO
XC5202
6.0
3.8
3.0
2.0
XC5204
6.4
4.1
3.2
2.3
XC5206
6.6
4.2
3.3
2.7
XC5210
6.6
4.2
3.3
2.9
XC5215
7.3
4.6
3.8
3.2
TS going Low to Longline going from floating High or Low
to active Low or High
T
ON
XC5202
7.8
5.6
4.7
4.0
XC5204
8.3
5.9
4.9
4.3
XC5206
8.4
6.0
5.0
4.4
XC5210
8.4
6.0
5.0
4.4
XC5215
8.9
6.3
5.3
4.5
TS going High to TBUF going inactive, not driving
Longline
T
OFF
XC52xx
3.0
2.8
2.6
2.4
Note: 1. Die-size-dependent parameters are based upon XC5215 characterization. Production specifications will vary with array
size.
TS
IO
TBUF
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XC5204-6PQG160C | 制造商:Xilinx 功能描述:XC5204-6PQG160C, FPGA XC5200 FAMILY 6K GATES 480 CELLS - Trays 制造商:Xilinx 功能描述:Xilinx XC5204-6PQG160C, FPGA XC5200 Family 6K Gates 480 Cells 83MHz 0.5um (CMOS) Technology 5V 160-Pin PQFP |
| XC5204-6TQ144C | 功能描述:IC FPGA 120 CLB'S 144-TQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:XC5200 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55） |
| XC5204-6TQ144I | 制造商:Xilinx 功能描述: |
| XC5204-6TQ176C | 制造商:XILINX 制造商全称:XILINX 功能描述:Field Programmable Gate Arrays |
| XC5204-6VQ100C | 功能描述:IC FPGA 120 CLB'S 100-VQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:XC5200 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55） |
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