Bus Control and Input/Output (I/O)
MC68HC812A4 Data Sheet, Rev. 7
66
Freescale Semiconductor
6.3.5 Port C Data Register
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
Bits PC7–PC0 correspond to data lines DATA15–DATA8. When this port is not used for external data
such as in single-chip mode, these pins can be used as general-purpose I/O. DDRC determines the
primary direction for each pin. In narrow expanded modes, DATA15–DATA8 and DATA7–DATA0 are
multiplexed into the MCU through port C pins on successive cycles. This register is not in the on-chip map
in expanded and peripheral modes.
When the MCU is operating in special expanded narrow mode and port C and port D are being used for
internal visibility, internal accesses produce full 16-bit information with DATA15–DATA8 on port C and
DATA7–DATA0 on port D. This allows the MCU to operate at full speed while making 16-bit access
information available to external development equipment in a single cycle. In this narrow mode, normal
16-bit accesses to external memory get split into two successive 8-bit accesses on port C alone.
6.3.6 Port C Data Direction Register
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
DDRC is not in the on-chip map in expanded and peripheral modes.
This register determines the primary direction for each port C pin when functioning as a general-purpose
I/O port.
1 = Associated pin is an output.
0 = Associated pin is a high-impedance input.
Address: $0004
Bit 7
654321
Bit 0
Read:
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
Write:
Reset:
00000000
Expanded wide and peripheral:
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
DATA9
DATA8
Expanded narrow: DATA15/7
DATA14/6
DATA13/5
DATA12/4
DATA11/3
DATA10/2
DATA9/1
DATA8/0
Figure 6-5. Port C Data Register (PORTC)
Address: $0006
Bit 7
654321
Bit 0
Read:
DDRC7
DDRC6
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
Write:
Reset:
00000000
Figure 6-6. Port C Data Direction Register (DDRC)