Register Descriptions and Reset Initialization
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor
173
OR — Overrun Flag
OR is set when software fails to read the SCI data register before the receive shift register receives
the next frame. The data in the shift register is lost, but the data already in the SCI data registers is not
affected. Clear OR by reading SCI status register 1 with OR set and then reading the low byte of the
SCI data register.
1 = Overrun
0 = No overrun
NF — Noise Flag
NF is set when the SCI detects noise on the receiver input. NF is set during the same cycle as the
RDRF flag but does not get set in the case of an overrun. Clear NF by reading SCI status register 1
and then reading the low byte of the SCI data register.
1 = Noise
0 = No noise
FE — Framing Error Flag
FE is set when a logic 0 is accepted as the stop bit. FE is set during the same cycle as the RDRF flag
but does not get set in the case of an overrun. FE inhibits further data reception until it is cleared. Clear
FE by reading SCI status register 1 with FE set and then reading the low byte of the SCI data register.
1 = Framing error
0 = No framing error
PF — Parity Error Flag
PF is set when the parity enable bit, PE, is set and the parity of the received data does not match its
parity bit. Clear PF by reading SCI status register 1 and then reading the low byte of the SCI data
register.
1 = Parity error
0 = No parity error
14.6.5 SCI Status Register 2
Read: Anytime
Write: Has no meaning or effect
RAF — Receiver Active Flag
RAF is set when the receiver detects a logic 0 during the RT1 time period of the start bit search. RAF
is cleared when the receiver detects false start bits (usually from noise or baud rate mismatch) or when
the receiver detects an idle character.
1 = Reception in progress
0 = No reception in progress
SCI0: $00C5
SCI1: $00CD
Bit 7
6
5
4321
Bit 0
Read:
000
0000
RAF
Write:
Reset:
000
00000
= Unimplemented
Figure 14-22. SCI Status Register 2 (SC0SR2 or SC1SR2)