参数资料
型号: XC6VCX195T-2FFG784I
厂商: Xilinx Inc
文件页数: 11/52页
文件大小: 0K
描述: IC FPGA VIRTEX 6 199K 784FFGBGA
产品培训模块: Virtex-6 FPGA Overview
产品变化通告: Virtex-6 FIFO Input Logic Reset 18/Apr/2011
标准包装: 1
系列: Virtex® 6 CXT
LAB/CLB数: 15600
逻辑元件/单元数: 199680
RAM 位总计: 12681216
输入/输出数: 400
电源电压: 0.95 V ~ 1.05 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 784-BBGA,FCBGA
供应商设备封装: 784-FCBGA
Virtex-6 CXT Family Data Sheet
DS153 (v1.6) February 11, 2011
Product Specification
19
GTX Transceiver DC Input and Output Levels
Table 25 summarizes the DC output specifications of the GTX transceivers in Virtex-6 CXT FPGAs. Consult the Virtex-6
FPGA GTX Transceivers User Guide for further details.
Table 25: GTX Transceiver DC Specifications
Symbol
DC Parameter
Conditions
Min
Typ
Max
Units
DVPPIN
Differential peak-to-peak input
voltage
External AC coupled
125
2000
mV
VIN
Absolute input voltage
DC coupled
MGTAVTT = 1.2V
–400
MGTAVTT
mV
VCMIN
Common mode input voltage
DC coupled
MGTAVTT = 1.2V
2/3 MGTAVTT
mV
DVPPOUT
Differential peak-to-peak output
voltage(1)
Transmitter output swing is set to
maximum setting
1000
mV
VCMOUTDC
DC common mode output voltage Equation based
MGTAVTT – DVPPOUT/4
mV
RIN
Differential input resistance
80
100
130
ROUT
Differential output resistance
80
100
120
TOSKEW
Transmitter output pair (TXP and TXN) intra-pair skew
2
8
ps
CEXT
Recommended external AC coupling capacitor(2)
100
nF
Notes:
1.
The output swing and preemphasis levels are programmable using the attributes discussed in Virtex-6 FPGA GTX Transceivers User Guide
and can result in values lower than reported in this table.
2.
Other values can be used as appropriate to conform to specific protocols and standards.
X-Ref Target - Figure 11
Figure 11: Single-Ended Peak-to-Peak Voltage
X-Ref Target - Figure 12
Figure 12: Differential Peak-to-Peak Voltage
0
+V
P
N
ds153_11_041410
Single-Ended
Voltage
0
+V
–V
P–N
ds153_12_041410
Differential
Voltage
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