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参数资料
| 型号： | XR17V252IM-0A-EVB |
| 厂商： | Exar Corporation |
| 文件页数： | 23/69页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR XR17V252 100TQFP |
| 标准包装： | 1 |
| 系列： | * |
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XR17V252
3
REV. 1.0.2
66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT
PIN DESCRIPTIONS
NAME
PIN #
TYPE
DESCRIPTION
PCI LOCAL BUS INTERFACE
RST#
86
I
PCI Bus reset input (active low). It resets the PCI local bus configuration
space registers, device configuration registers and UART channel registers
to the default condition, see
CLK
87
I
PCI Bus clock input of up to 66.67MHz.
AD31-AD24,
AD23-AD16,
AD15-AD8,
AD7-AD0
90-97,
2-9,
24-31,
35-42
I/O
Address data lines [31:0] (bidirectional).
FRAME#
13
I
Bus transaction cycle frame (active low). It indicates the beginning and dura-
tion of an access.
C/BE3#-
C/BE0#
98, 12,
21, 34
I
Bus Command/Byte Enable [3:0] (active low). This line is multiplexed for bus
Command during the address phase and Byte Enables during the data
phase.
IRDY#
14
I
Initiator Ready (active low). During a write, it indicates that valid data is
present on data bus. During a read, it indicates the master is ready to accept
data.
TRDY#
15
O
Target Ready (active low).
STOP#
17
O
Target request to stop current transaction (active low).
IDSEL
99
I
Initialization device select (active high).
DEVSEL#
16
O
Device select to the XR17V252 (active low).
INTA#
85
OD
Device interrupt from XR17V252 (open drain, active low).
PAR
20
I/O
Parity is even across AD[31:0] and C/BE[3:0]#. (bidirectional, active high).
PERR#
18
O
Data Parity error indicator, except for Special Cycle transactions (active low).
Optional in bus target application.
SERR#
19
OD
System error indicator, Address parity or Data parity during Special Cycle
transactions (open drain, active low). Optional in bus target application.
MODEM OR SERIAL I/O INTERFACE
TX0
73
O
UART channel 0 Transmit Data or infrared transmit data. Normal TXD output
idles HIGH while infrared TXD output idles LOW.
RX0
66
I
UART channel 0 Receive Data or infrared receive data. Normal RXD input
idles HIGH while infrared RXD input idles LOW. In the infrared mode, the
polarity of the incoming RXD signal can be selected via FCTR bit-4. If this bit
is a logic 0, a LOW on the RXD input is considered a mark and if this bit is a
logic 1, a HIGH on the RXD input is considered a space.
RTS0#
71
O
UART channel 0 Request to Send or general purpose output (active low). If
this output is not used, leave it unconnected.
CTS0#
67
I
UART channel 0 Clear to Send or general purpose input (active low). This
input should be connected to VCC when not used.
DTR0#
72
O
UART channel 0 Data Terminal Ready or general purpose output (active
low). If this output is not used, leave it unconnected.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XR17V252IM-F | 功能描述:UART 接口集成电路 66MHz Dual PCI UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR17V252IMTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 64Byte FIFO 3.3V 100-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR17V252IMTR-F |
| XR17V254 | 制造商:EXAR 制造商全称:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254_08 | 制造商:EXAR 制造商全称:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV | 制造商:EXAR 制造商全称:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
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