参数资料
| 型号： | XRT72L71IQ |
| 厂商： | Exar Corporation |
| 文件页数： | 10/102页 |
| 文件大小： | 0K |
| 描述： | IC FRAMER DS3 ATM UNI 160PQFP |
| 产品变化通告： | XRT72Lx Series Obsolescence 02/May/2012 |
| 标准包装： | 24 |
| 控制器类型： | DS3 ATM UNI，透明通道调帧器 |
| 电源电压： | 3.3V |
| 电流 - 电源： | 120mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 160-BQFP |
| 供应商设备封装： | 160-PQFP（28x28） |
| 包装： | 托盘 |
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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
11
54
55
56
57
58
RxUData7
RxUData14
RxUData6
RxUData13
RxUData5
O
Receive UTOPIA Data Bus Output:
Please see description of RxUData15, pin 53.
NOTE: This output pin is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
59
VDD
***
Power Supply Pin
60
61
62
63
64
65
RxUData4
RxUData12
RxUData3
RxUData11
RxUData2
RxUData10
O
Receive UTOPIA Data Bus Output:
Please see description of RxUData15, pin 53.
NOTE: This output pin is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
66
VDD
***
Power Supply Pin
67
68
69
RxUData9
RxUData1
RxUData8
O
Receive UTOPIA Data Bus Output:
Please see description of RxUData15, pin 53.
NOTE: This output pin is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
70
RxUData0
O
Receive UTOPIA Data Bus Output - LSB:
Please see description of RxUData15, pin 53.
NOTE: This output pin is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
71
GND
***
Ground Signal Pin
72
RxUSoC
O
Receive UTOPIA Interface—Start of Cell Indicator: This output pin allows
the ATM Layer Processor to determine the boundaries or the ATM cells that
are output via the Receive UTOPIA Data bus. The Receive UTOPIA Interface
block will assert this signal when the first byte (or word) of a new cell is
present on the Receive UTOPIA Data Bus; RxUData[15:0].
NOTE: This output pin is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
73
RxUAddr4
I
Receive UTOPIA Address Bus input (MSB): This input pin, along with
RxUAddr3 through RxUAddr0 functions as the Receive UTOPIA Address bus
inputs. These input pins are only active when the UNI is operating in the Multi-
PHY Mode. The Receive UTOPIA Address Bus input is sampled on the rising
edge of the RxUClk signal. The contents of this address bus are compared
with the value stored in the “Rx UT Address Register (Address = 6Ch). If
these two values match, then the UNI will inform the ATM Layer Processor on
whether or not it has any new ATM cells to be read from the RxFIFO; by driv-
ing the RxUClav output to the appropriate level. If these two address values
do not match, then the UNI will not respond to the ATM Layer Processor; and
will keep its RxUClav output signal tri-stated.
NOTE: The user should tie this pin to “GND”, whenever the XRT72L71 has
been configured to operate in the “Clear-Channel-Framer” Mode.
74
RxUPrty
O
Receive UTOPIA Interface—Parity Output pin: The Receive UTOPIA interface
block will compute the odd-parity of each byte (or word) that will place in the
Receive UTOPIA Data Bus. This odd-parity value will be output on this pin,
while the corresponding byte (or word) is present on the Receive UTOPIA Data
Bus.
NOTE: This output pin is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
PIN DESCRIPTION (CONTINUED)
PIN NO.
SYMBOL
TYPE
DESCRIPTION
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| XRT72L71IQ-F | 功能描述:网络控制器与处理器 IC Single CH DS3 UNI (3.3V) RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| XRT72L73IB | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Telecommunication IC |
| XRT72L74IB | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Telecommunication IC |
| XRT7300 | 制造商:EXAR 制造商全称:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300ES | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
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