参数资料
| 型号： | XRT72L71IQ |
| 厂商： | Exar Corporation |
| 文件页数： | 73/102页 |
| 文件大小： | 0K |
| 描述： | IC FRAMER DS3 ATM UNI 160PQFP |
| 产品变化通告： | XRT72Lx Series Obsolescence 02/May/2012 |
| 标准包装： | 24 |
| 控制器类型： | DS3 ATM UNI，透明通道调帧器 |
| 电源电压： | 3.3V |
| 电流 - 电源： | 120mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 160-BQFP |
| 供应商设备封装： | 160-PQFP（28x28） |
| 包装： | 托盘 |
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XRT72L71
á
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
68
TABLE 48: PMON SINGLE-BIT HEC ERROR COUNT - LSB
REGISTER 47
PMON SINGLE-BIT HEC ERROR COUNT - LSB
HEX ADDRESS: 0X2F
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
S-HEC Error Count Low-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Single-Bit HEC Error
Count Register - MSB” contains the 16 bit value for the total number of Sin-
gle-bit HEC byte errors that have been detected since the last read of this
register. This register contains the “Low” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
TABLE 49: PMON MULTIPLE-BIT HEC ERROR COUNT - MSB
REGISTER 48
PMON MULTIPLE-BIT HEC ERROR COUNT - MSB
HEX ADDRESS: 0X30
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
M-HEC Error Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Multiple-Bit HEC Error
Count Register - LSB” contains the 16 bit value for the total number of Multi-
bit HEC byte errors that have been detected since the last read of this regis-
ter. This register contains the “High” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71has been configured to
operate in the “ATM UNI” Mode.
TABLE 50: PMON MULTIPLE-BIT HEC ERROR COUNT - LSB
REGISTER 49
PMON MULTIPLE-BIT HEC ERROR COUNT - LSB
HEX ADDRESS: 0X31
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
M-HEC Error Count Low-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Multiple-Bit HEC Error
Count Register - MSB” contains the 16 bit value for the total number of Multi-
bit HEC byte errors that have been detected since the last read of this regis-
ter. This register contains the “Low” byte value of this 16-bit expression.
NOTE: This register is only active if the device has been configured to oper-
ate in the “ATM UNI” Mode.
TABLE 51: PMON RECEIVED IDLE CELL COUNT/PRBS ERROR COUNT - MSB
REGISTER 50
PMON RECEIVED IDLE CELL COUNT/PRBS ERROR COUNT - MSB
HEX ADDRESS: 0X32
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
Rx Idle Cell Count High-
byte/
PRBS Error Count High-
byte
RUR
0x00
ATM Mode: This register, along with “PMON Received Idle Cell
Count - LSB” contains the 16 bit value for the total number of idle
cells that have been received by the Receive Cell Processor, since
the last read of this register. This register contains the “High” byte
value of this 16-bit expression.
Clear Channel Framer Mode: This register, along with “PMON
PRBS Error Count - LSB” regster contains the 16 bit value for the
total number of PRBS bit errors that have been received (by the
PRBS Receiver) since the last read of this register. This register
contains the “High” byte value of this 16-bit expression.
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| XRT72L71IQ-F | 功能描述:网络控制器与处理器 IC Single CH DS3 UNI (3.3V) RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
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