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参数资料
型号： XRT72L71IQ
厂商： Exar Corporation
文件页数： 59/102页
文件大小： 0K
描述： IC FRAMER DS3 ATM UNI 160PQFP
产品变化通告： XRT72Lx Series Obsolescence 02/May/2012
标准包装： 24
控制器类型： DS3 ATM UNI，透明通道调帧器
电源电压： 3.3V
电流 - 电源： 120mA
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 160-BQFP
供应商设备封装： 160-PQFP（28x28）
包装： 托盘
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER IC
á
REV. 1.1.0
III
TABLE 40: PMON FEBE EVENT COUNT REGISTER - LSB ................................................................................. 66
TABLE 41: PMON PLCP BIP-8 ERROR COUNT REGISTER - MSB ..................................................................... 66
TABLE 42: PMON PLCP BIP-8 ERROR COUNT REGISTER - LSB ...................................................................... 66
TABLE 43: PMON PLCP FRAMING BYTE ERROR COUNT REGISTER - MSB ........................................................ 66
TABLE 44: PMON PLCP FRAMING BYTE ERROR COUNT REGISTER - LSB ......................................................... 67
TABLE 45: PMON PLCP FEBE COUNT REGISTER - MSB ................................................................................. 67
TABLE 46: PMON PLCP FEBE COUNT REGISTER -LSB ................................................................................... 67
TABLE 47: PMON SINGLE-BIT HEC ERROR COUNT - MSB ................................................................................ 67
TABLE 48: PMON SINGLE-BIT HEC ERROR COUNT - LSB ................................................................................. 68
TABLE 49: PMON MULTIPLE-BIT HEC ERROR COUNT - MSB ............................................................................ 68
TABLE 50: PMON MULTIPLE-BIT HEC ERROR COUNT - LSB ............................................................................. 68
TABLE 51: PMON RECEIVED IDLE CELL COUNT/PRBS ERROR COUNT - MSB ................................................... 68
TABLE 52: PMON RECEIVED IDLE CELL COUNT/PRBS ERROR COUNT - LSB .................................................... 69
TABLE 53: PMON RECEIVE VALID CELL COUNT - MSB ..................................................................................... 69
TABLE 54: PMON RECEIVE VALID CELL COUNT - LSB ...................................................................................... 69
TABLE 55: PMON DISCARDED CELL COUNT - MSB ........................................................................................... 69
TABLE 56: PMON DISCARDED CELL COUNT - LSB ............................................................................................ 70
TABLE 57: PMON TRANSMIT IDLE CELL COUNT - MSB ...................................................................................... 70
TABLE 58: PMON TRANSMIT IDLE CELL COUNT - LSB ....................................................................................... 70
TABLE 59: PMON TRANSMIT VALID CELL COUNT - MSB ................................................................................... 70
TABLE 60: PMON TRANSMIT VALID CELL COUNT - LSB .................................................................................... 71
TABLE 61: PMON HOLDING REGISTER .............................................................................................................. 71
TABLE 62: ONE SECOND ERROR STATUS REGISTER .......................................................................................... 71
TABLE 63: LCV - ONE SECOND ACCUMULATOR REGISTER - MSB ...................................................................... 71
TABLE 64: LCV - ONE SECOND ACCUMULATOR REGISTER - LSB ....................................................................... 72
TABLE 65: P-BIT ERRORS - ONE SECOND ACCUMULATOR REGISTER - MSB ...................................................... 72
TABLE 66: P-BIT ERRORS - ONE SECOND ACCUMULATOR REGISTER - LSB ....................................................... 72
TABLE 67: HEC BYTE ERRORS - ONE SECOND ACCUMULATOR REGISTER - MSB .............................................. 72
TABLE 68: HEC BYTE ERRORS - ONE SECOND ACCUMULATOR REGISTER -LSB ................................................ 72
TABLE 69: RX PLCP CONFIGURATION/STATUS REGISTER .................................................................................. 73
TABLE 70: RX PLCP INTERRUPT ENABLE REGISTER .......................................................................................... 73
TABLE 71: RX PLCP INTERRUPT STATUS REGISTER .......................................................................................... 74
TABLE 72: FUTURE USE .................................................................................................................................... 74
TABLE 73: TX PLCP FA1 BYTE ERROR MASK REGISTER ................................................................................... 74
TABLE 74: TX PLCP FA2 BYTE ERROR MASK REGISTER ................................................................................... 74
TABLE 75: TX PLCP BIP-8 ERROR MASK ......................................................................................................... 75
TABLE 76: TX PLCP G1 BYTE REGISTER .......................................................................................................... 75
TABLE 77: RX CP CONFIGURATION REGISTER ................................................................................................... 76
TABLE 78: RX CP ADDITIONAL CONFIGURATION REGISTER ................................................................................ 77
TABLE 79: RX CP INTERRUPT ENABLE REGISTER .............................................................................................. 78
TABLE 80: RX CP INTERRUPT STATUS REGISTER .............................................................................................. 79
TABLE 81: RX CP IDLE CELL PATTERN HEADER BYTE-1 .................................................................................... 79
TABLE 82: RX CP IDLE CELL PATTERN HEADER BYTE-2 .................................................................................... 80
TABLE 83: RX CP IDLE CELL PATTERN HEADER BYTE-3 .................................................................................... 80
TABLE 84: RX CP IDLE CELL PATTERN HEADER BYTE-4 .................................................................................... 80
TABLE 85: RX CP IDLE CELL MASK HEADER BYTE-1 ......................................................................................... 81
TABLE 86: RX CP IDLE CELL MASK HEADER BYTE-2 ......................................................................................... 81
TABLE 87: RX CP IDLE CELL MASK HEADER BYTE-3 ......................................................................................... 82
TABLE 88: RX CP IDLE CELL MASK HEADER BYTE-4 ......................................................................................... 82
TABLE 89: RX CP USER CELL FILTER PATTERN HEADER BYTE-1 ...................................................................... 82
TABLE 90: RX CP USER CELL FILTER PATTERN HEADER BYTE-2 ...................................................................... 83
TABLE 91: RX CP USER CELL FILTER PATTERN HEADER BYTE-3 ...................................................................... 83
TABLE 92: RX CP USER CELL FILTER PATTERN HEADER BYTE-4 ...................................................................... 83
TABLE 93: RX CP USER CELL FILTER MASK HEADER BYTE-1 ............................................................................ 83
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