参数资料
型号: XRT8001ID-F
厂商: Exar Corporation
文件页数: 21/48页
文件大小: 0K
描述: IC WAN T1/E1 DUAL 18SOIC
标准包装: 20
类型: 时钟/频率发生器
PLL:
主要目的: 以太网(WAN),T1/E1
输入: 时钟
输出: 时钟
电路数: 1
比率 - 输入:输出: 1:2
差分 - 输入:输出: 无/无
频率 - 最大: 16.384kHz
电源电压: 3.3 V ~ 5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 18-SOIC(0.295",7.50mm 宽)
供应商设备封装: 18-SOIC
包装: 管件
其它名称: 1016-1358-5
XRT8001
28
Rev. 1.01
For example, if the user wishes to input a clock signal
of 2.048MHz, to the “FIN” input pin (e.g., where Q = 1),
then he/she should write a “0” into Command Register
CR1.
Note: If the user wishes to output a clock signal via the
CLK2 output signal, then he/she should also write a “1” into
the “PL2EN” bit-field within Command Register CR1.
Step 4 – Write the binary expression “11111” into
Command Register CR2, as illustrated below.
This step is necessary in order to insure proper opera-
tion of the XRT8001.
Command Register, CR2 (Address = 0x02)
D4
D3
D2
D1
D0
SEL14
SEL13
SEL12
SEL11
SEL10
1
Step 5 – Write the binary expression “11111” into
Command Register CR3, as illustrated below.
This step is necessary in order to insure proper opera-
tion of the XRT8001. This step is also illustrated
below.
Command Register, CR3 (Address = 0x03)
D4
D3
D2
D1
D0
SEL24
SEL23
SEL22
SEL21
SEL20
1
Step 6 – Enable any of the following output signals as
appropriate:
“SYNC”, “CLK1”, “CLK2” and
“LOCKDET”.
This is accomplished by writing a “1” into the corre-
sponding bit-fields, within Command Register CR4, as
illustrated below.
Command Register CR4, (Address = 0x04)
D4
D3
D2
D1
D0
SYNCEN
CLK1EN
CLK2EN
LDETDIS2
LDETDIS1
1
0
6.6 The “High Speed – Reverse” Mode
When the XRT8001 WAN Clock has been configured to
operate in the “High Speed – Reverse” Modes, its
operation is independent of whether it has been config-
ured in the "Master" or "Slave" Mode.
When the XRT8001 WAN Clock has been configured to
operate in the “High Speed – Reverse” Modes, then it
will accept a “64kHz” clock signal via the “Reference
Clock” input at FIN (pin 3). In response, to this clock
signal, the XRT8001 WAN Clock will output an “M x
2.048MHz” clock signal via the Clock Output pins
(CLK1 and/or CLK2); where M can only have the values
1, 2,4 or 8.
A simple illustration of the XRT8001 WAN Clock,
operating in the “High Speed – Reverse” Mode is
presented in Figure 17.
相关PDF资料
PDF描述
XRT8000ID-F IC WAN CLOCK E1/E1 DUAL 18SOIC
D38999/24FH53SA CONN RCPT 53POS JAM NUT W/SCKT
VE-BW0-MW-F2 CONVERTER MOD DC/DC 5V 100W
MS3110F22-55SY CONN RCPT 55POS WALL MNT W/SCKT
VE-BW0-MW-F1 CONVERTER MOD DC/DC 5V 100W
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