参数资料
型号: ZL2004ALNNT1
厂商: Intersil
文件页数: 30/42页
文件大小: 0K
描述: IC REG CTRLR BUCK SYNC ADJ 32QFN
标准包装: 1,000
PWM 型: 电压模式
输出数: 1
频率 - 最大: *
占空比: 95%
电源电压: 4.5 V ~ 14 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 带卷 (TR)
ZL2004
6.5 Thermal Overload Protection
The ZL2004 includes an on-chip thermal sensor that
continuously measures the internal temperature of the
die and shuts down the device when the temperature
exceeds the preset limit. The default temperature limit
is set to 125°C in the factory, but the user may set the
limit to a different value if desired. See Application
Note AN33 for details. Note that setting a higher
thermal limit via the I 2 C/SMBus interface may result in
permanent damage to the device. Once the device has
been disabled due to an internal temperature fault, the
user may select one of several fault response options as
follows:
1. Initiate a shutdown and attempt to restart an
infinite number of times with a preset delay period
between attempts.
2. Initiate a shutdown and attempt to restart a preset
number of times with a preset delay period
between attempts.
3. Continue operating for a given delay period,
followed by shutdown if the fault still exists.
4. Continue operating through the fault (this could
result in permanent damage to the power supply).
5. Initiate an immediate shutdown.
If the user has configured the device to restart, the
device will wait the preset delay period (if configured
to do so) and will then check the device temperature. If
the temperature has dropped below a threshold that is
approx 15°C lower than the selected temperature fault
limit, the device will attempt to re-start. If the
temperature still exceeds the fault limit the device will
wait the preset delay period and retry again.
The default response from a temperature fault is an
immediate shutdown of the device. The device will
continuously check for the fault condition, and once
the fault has cleared the ZL2004 will be re-enabled.
30
6.6 Voltage Tracking
Numerous high performance systems place stringent
demands on the order in which the power supply
voltages are turned on. This is particularly true when
powering FPGAs, ASICs, and other advanced
processor devices that require multiple supply voltages
to power a single die. In most cases, the I/O interface
operates at a higher voltage than the core and therefore
the core supply voltage must not exceed the I/O supply
voltage according to the manufacturers' specifications.
The ZL2004 integrates a lossless tracking scheme that
allows its output to track a voltage that is applied to the
VTRK pin with no external components required. The
VTRK pin is an analog input that, when tracking mode
is enabled, configures the voltage applied to the VTRK
pin to act as a reference for the device’s output
regulation.
Figure 18 illustrates the typical connection and the two
tracking modes:
1. Coincident . This mode configures the ZL2004 to
ramp its output voltage at the same rate as the
voltage applied to the VTRK pin.
2. Ratiometric . This mode configures the ZL2004 to
ramp its output voltage at a rate that is a percentage
of the voltage applied to the VTRK pin. The
default setting is 50%, but an external resistor
string may be used to configure a different tracking
ratio.
The master ZL2004 device in a tracking group is
defined as the device that has the highest target output
voltage within the group. This master device will
control the ramp rate of all tracking devices and is not
configured for tracking mode. A delay of at least 10 ms
must be configured into the master device using the SS
pin and the user may also configure a specific ramp
rate using the SS pin.
Any device that is configured for tracking mode will
ignore its soft-start delay and ramp time settings (SS
pin) and its output will take on the turn-on/turn-off
characteristics of the reference voltage present at the
VTRK pin.
FN6846.3
February 15, 2011
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