参数资料
型号: ZL2004ALNNT1
厂商: Intersil
文件页数: 32/42页
文件大小: 0K
描述: IC REG CTRLR BUCK SYNC ADJ 32QFN
标准包装: 1,000
PWM 型: 电压模式
输出数: 1
频率 - 最大: *
占空比: 95%
电源电压: 4.5 V ~ 14 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 带卷 (TR)
ZL2004
Table 20. Tracking Mode Configuration
R SS
19.6 k
UVLO
Tracking
Ratio
Upper Track Limit
Limited by target
Ramp-up / Ramp-down Behavior
Output not allowed to decrease before PG
21.5 k
23.7 k
26.1 k
28.7 k
31.6 k
34.8 k
38.3 k
42.2 k
46.4 k
51.1 k
56.2 k
61.9 k
68.1 k
75 k
82.5 k
4.5 V
10.8 V
100%
50%
100%
50%
voltage
Limited by VTRK
pin voltage
Limited by target
voltage
Limited by VTRK
pin voltage
Limited by target
voltage
Limited by VTRK
pin voltage
Limited by target
voltage
Limited by VTRK
pin voltage
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
6.9 I C/SMBus Communications
2
Table 21. SMBus Device Address Selection
The ZL2004 provides an I 2 C/SMBus digital interface
LOW
SA0
OPEN
HIGH
that enables the user to configure all aspects of the
LOW
0x20
0x21
0x22
device operation as well as monitor the input and
output parameters. The ZL2004 can be used with any
SA1
OPEN
HIGH
0x23
0x26
0x24
0x27
0x25
Reserved
standard 2-wire I 2 C host device. In addition, the device
6.10 I C/SMBus Device Address Selection
is compatible with SMBus version 2.0 and includes an
SALRT line to help mitigate bandwidth limitations
related to continuous fault monitoring. Pull-up resistors
are required on the I 2 C/SMBus. The ZL2004 accepts
most standard PMBus commands. When controlling
the device with PMBus commands, it is recommended
that the enable pin is tied to SGND.
2
When communicating with multiple SMBus devices
using the I 2 C/SMBus interface, each device must have
its own unique address so the host can distinguish
between the devices. The device address can be set
according to the pin-strap options listed in Table 21.
Address values are right-justified.
32
If additional device addresses are required, a resistor
can be connected to the SA0 pin according to Table 22
to provide up to 25 unique device addresses. In this
case, the SA1 pin should be tied to SGND.
If more than 25 unique device addresses are required or
if other SMBus address values are desired, both the SA0
and SA1 pins can be configured with a resistor to SGND
according to the following equation and Table 23.
SMBus address = 25 x (SA1 index) + (SA0 index)
(in decimal)
FN6846.3
February 15, 2011
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