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参数资料
| 型号： | ZL50233/GDG |
| 厂商： | ZARLINK SEMICONDUCTOR INC |
| 元件分类： | 数字传输电路 |
| 英文描述： | DATACOM, ISDN ECHO CANCELLER, PBGA208 |
| 封装： | 17 X 17 MM, 1.30 MM HEIGHT, MO-192, LBGA-208 |
| 文件页数： | 9/38页 |
| 文件大小： | 547K |
| 代理商： | ZL50233/GDG |
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ZL50233
Data Sheet
17
Zarlink Semiconductor Inc.
Figure 10 - Memory Mapping
6.4
Power Up Sequence
On power up, the RESET pin must be held low for 100
s. Forcing the RESET pin low will put the ZL50233 in power
down state. In this state, all internal clocks are halted, D<7:0>, Sout, Rout, DTA and IRQ pins are tristated. The 8
Main Control Registers, the Interrupt FIFO Register and the Test Register are reset to zero.
When the RESET pin returns to logic high and a valid MCLK is applied, the user must wait 500
s for the PLL to
lock. C4i and F0i can be active during this period. At this point, the echo canceller must have the internal registers
reset to an initial state. This is accomplished by one of two methods. The user can either issue a second hardware
reset or perform a software reset. A second hardware reset is performed by driving the RESET pin low for at least
500ns and no more than 1500ns before being released. A software reset is accomplished by programming a “1” to
each of the PWUP bits in the Main Control Registers, waiting 250
s (2 frames) and then programming a “0” to
each of the PWUP bits.
The user must then wait 500
s for the PLL to relock. Once the PLL has locked, the user can power up the 16
groups of echo cancellers individually by writing a “1” into the PWUP bit in Main Control Register of each echo
canceller group.
For each group of echo cancellers, when the PWUP bit toggles from zero to one, echo cancellers A and B execute
their initialization routine. The initialization routine sets their registers, Base Address+00hex to Base Address+3Fhex,
to the default Reset Value and clears the Adaptive Filter coefficients. Two frames are necessary for the initialization
routine to execute properly.
Once the initialization routine is executed, the user can set the per channel Control Registers, Base Address+00hex
to Base Address+3Fhex, for the specific application.
0000h -->
Channel 0, ECA Ctrl/Stat Registers
001Fh
0020h -->
Channel 1, ECB Ctrl/Stat Registers
003Fh
0040h -->
Channel 2, ECA Ctrl/Stat Registers
005Fh
0060h -->
Channel 3, ECB Ctrl/Stat Registers
007Fh
0400h --> 0407h
Main Control Registers <7:0>
Group 0
Echo
Cancellers
Registers
Group 1
Echo
Cancellers
Registers
0410h
Interrupt FIFO Register
0411h
Test Register
0412h ---> FFFFh
Reserved Test Register
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL50233QC | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:4 Channel Voice Echo Cancellor |
| ZL50233QCC | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:4 Channel Voice Echo Cancellor |
| ZL50233QCG1 | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 4-CH G.165/G.168/G.711 W/ TONE DETECTION - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 4CH 100LQFP 制造商:Microsemi Corporation 功能描述:IC VOICE ECHO CANCEL 4CH 100LQFP |
| ZL50234 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:8 Channel Voice Echo Canceller |
| ZL50234/GDC | 制造商:Microsemi Corporation 功能描述:ECHO Canceller Chip 8-CH G.164/G.165/G.168/G.711 With Tone Detection 208-Pin LBGA Tray 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 8CH G.164/G.165/G.168/G.711 W/ TONE DETE - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 8CH 208LBGA 制造商:Microsemi Corporation 功能描述:IC VOICE ECHO CANCEL 8CH 208LBGA |
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