参数资料
型号: A0800AMS3C
厂商: ADVANCED MICRO DEVICES INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 800 MHz, MICROPROCESSOR, CPGA462
封装: STAGGERED, CERAMIC, PGA-453
文件页数: 85/90页
文件大小: 1492K
代理商: A0800AMS3C
74
Appendix A
AMD Athlon Processor Model 4 Data Sheet
23792H—March 2001
Preliminary Information
s
Invalid and Don’t-Care—In timing diagrams, signal ranges
that are invalid or don't-care are filled with a screen pattern.
Data Terminology
The following list defines data terminology:
s
Quantities
A word is two bytes (16 bits)
A doubleword is four bytes (32 bits)
A quadword is eight bytes (64 bits)
s
Addressing—Memory is addressed as a series of bytes on
eight-byte (64-bit) boundaries in which each byte can be
separately enabled.
s
Abbreviations—The following notation is used for bits and
bytes:
Kilo (K, as in 4-Kbyte page)
Mega (M, as in 4 Mbits/sec)
Giga (G, as in 4 Gbytes of memory space)
See Table 20 on page 75 for more abbreviations.
s
Little-Endian Convention—The byte with the address
xx...xx00 is in the least-significant byte position (little end).
In byte diagrams, bit positions are numbered from right to
left—the little end is on the right and the big end is on the
left. Data structure diagrams in memory show low addresses
at the bottom and high addresses at the top. When data
items are aligned, bit notation on a 64-bit data bus maps
directly to bit notation in 64-bit-wide memory. Because byte
addresses increase from right to left, strings appear in
reverse order when illustrated.
s
Bit Ranges—In text, bit ranges are shown with a dash (for
example, bits 9–1). When accompanied by a signal or bus
name, the highest and lowest bit numbers are contained in
brackets and separated by a colon (for example, AD[31:0]).
s
Bit Values—Bits can either be set to 1 or cleared to 0.
s
Hexadecimal and Binary Numbers—Unless the context
makes interpretation clear, hexadecimal numbers are
followed by an h and binary numbers are followed by a b.
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