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参数资料
| 型号： | A82596SX |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
| 中文描述： | 1 CHANNEL(S), 20M bps, LOCAL AREA NETWORK CONTROLLER, CPGA132 |
| 封装： | CERAMIC, PGA-132 |
| 文件页数： | 20/77页 |
| 文件大小： | 787K |
| 代理商： | A82596SX |
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82596DX/SX
TRANSMITTING FRAMES
The 82596 executes high-level Action Commands
from the Command List in system memory. Action
Commands are fetched and executed in parallel with
the host CPU operation, thereby significantly improv-
ing system performance. The format of the Action
Commands is shown in Figure 10. Figure 28 shows
the 82586 mode, and Figures 29 and 30 shows the
command formats of the Linear and 32-bit Segment-
ed modes.
A single Transmit command contains, as part of the
command-specific parameters, the destination ad-
dress and length field of the transmitted frame and a
pointer to buffer area in memory containing the data
portion of the frame. The data field is contained in a
memory data structure consisting of a buffer de-
scriptor (BD) and a data bufferDor a linked list of
buffer descriptors and buffersDas shown in Figure
11.
Multiple data buffers can be chained together using
the BDs. Thus, a frame with a long data field can be
transmitted using several (shorter) data buffers
chained together. This chaining technique allows the
system designer to develop efficient buffer manage-
ment.
The 82596 automatically generates the preamble
(alternating 1s and 0s) and start frame delimiter,
fetches the destination address and length field from
the Transmit command, inserts its unique address
as the source address, fetches the data field speci-
fied by the Transmit command, and computes and
appends the CRC to the end of the frame (see Fig-
ure 12). In the Linear and 32-bit Segmented mode
the CRC can be optionally inserted on a frame-by-
frame basis by setting the NC bit in the Transmit
Command Block (see Figures 29 and 30).
The 82596 generates the standard End Of Carrier
(EOC) start and end frame delimiters. In EOC, the
start frame delimiter is 10101011 and the end frame
delimiter is indicated by the lack of a signal after the
last bit of the frame check sequence field has been
transmitted. In EOC, the 82596 can be configured to
extend short frames by adding pad bytes (7Eh) dur-
ing transmission, according to the length field.
When a collision occurs, the 82596 manages the
jam, random wait, and retry processes, reinitializing
DMA pointers without CPU intervention. Multiple
frames can be sent by linking the appropriate num-
ber of Transmit commands together. This is particu-
larly useful when transmitting a message larger than
the maximum frame size (1518 bytes for Ethernet).
290219–10
Figure 10. Action Command Format
290219–11
Figure 11. Data Buffer Descriptor and
Data Buffer Structure
20
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