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参数资料
| 型号： | A82596SX |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
| 中文描述： | 1 CHANNEL(S), 20M bps, LOCAL AREA NETWORK CONTROLLER, CPGA132 |
| 封装： | CERAMIC, PGA-132 |
| 文件页数： | 58/77页 |
| 文件大小： | 787K |
| 代理商： | A82596SX |
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82596DX/SX
LENGTH FIELD
D The contents of this 2-byte field are user defined. In 802.3 it contains the length of
the data field. It is placed in memory in the same order it is received, i.e., most
significant byte first, least significant byte second.
NOTES
1. The Destination address, Source address and Length fields are packed, i.e., one field immediately follows
the next.
2. The affect of Address/Length Location (No Source Address Insertion) configuration parameter while re-
ceiving is as follows:
D 82586 Mode: The Destination address, Source address and Length field are not used, they are placed in
the RX data buffers.
D 32-Bit Segmented and Linear Modes: when the Simplified memory model is used, the Destination address,
Source address and Length fields reside in their respective fields in the RFD. When the Flexible memory
strucrture is used the Destination address, Source address, and Length field locations depend on the SIZE
field of the RFD. They can be placed in the RFD, in the RX data buffers, or partially in the RFD and the rest
in the RX data buffers, depending on the SIZE field value.
82586 Mode
16
15
31
ODD WORD
0
EVEN WORD
A15
A0
NEXT RBD OFFSET
EOF F
ACTUAL COUNT
0
X
X
X
X
X
X
X
X A23
A0
RECEIVE BUFFER ADDRESS
4
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
EL
X
SIZE
8
32-Bit Segmented Mode
16
15
31
ODD WORD
0
EVEN WORD
A15
A0
NEXT RBD OFFSET
EOF F
ACTUAL COUNT
0
A31
A0
RECEIVE BUFFER ADDRESS
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EL
P
SIZE
8
Linear Mode
16
15
31
ODD WORD
0
EVEN WORD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 EOF F
ACTUAL COUNT
0
A31
A0
NEXT RBD ADDRESS
4
A31
A0
RECEIVE BUFFER ADDRESS
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EL
P
SIZE
Figure 43. Receive Buffer Descriptor
58
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