参数资料
型号: A82596SX
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
中文描述: 1 CHANNEL(S), 20M bps, LOCAL AREA NETWORK CONTROLLER, CPGA132
封装: CERAMIC, PGA-132
文件页数: 53/77页
文件大小: 787K
代理商: A82596SX
82596DX/SX
290219–15
Figure 37. The Receive Frame Area
Simplified Memory Structure
The first is the Simplified memory structure, the data section of the received frame is part of the RFD and is
located immediately after the Length Field. Receive Buffer Descriptors are not used with the Simplified struc-
ture, it is primarily used to make programming easier. If the length of the data area described in the Size Field
is smaller than the incoming frame, the following happens.
1. The received frame is truncated.
2. The No Resource error counter is updated.
3. If the 82596 is configured to Save Bad Frames the RFD is not reused; otherwise, the same RFD is used to
hold the next received frame, and the only action taken regarding the truncated frame is to update the
counter.
4. The 82596 continues to receive the next frame in the next RFD.
53
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