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参数资料
| 型号： | A82596SX |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
| 中文描述： | 1 CHANNEL(S), 20M bps, LOCAL AREA NETWORK CONTROLLER, CPGA132 |
| 封装： | CERAMIC, PGA-132 |
| 文件页数： | 24/77页 |
| 文件大小： | 787K |
| 代理商： | A82596SX |
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82596DX/SX
STATION DIAGNOSTICS
AND SELF-TEST
The 82596 provides a large set of diagnostic and
network management functions. These include inter-
nal and external loopback and time domain reflec-
tometry for locating fault points in the network cable.
The 82596 ensures software reliability by dumping
the contents of the 82596 internal registers into sys-
tem memory. The 82596 has a self-test mode that
enables it to run an internal self-test and place the
results in system memory.
82586 SOFTWARE COMPATIBILITY
The 82596 has a software-compatible state in which
all its memory structures are compatible with the
82586 memory structure. This includes all the Action
Commands, the Receive Frame Area (including the
RFD, Buffer Descriptors, and Data Buffers), the Sys-
tem Control Block, and the initialization procedures.
There are two minor differences between the 82596
in the 82586-Compatible memory structure and the
82586.
#
When the internal and external loopback bits in
the Configure command are set to 11 the 82596
is in external loopback and the LPBK pin is acti-
vated; in the 82586 this situation would produce
internal loopback.
#
During a Dump command both the 82596 and
82586 dump the same number of bytes; however,
the data format is different.
INITIALIZING THE 82596
A Reset command is issued to the 82596 to prepare
it for normal operation. The 82596 is initialized
through two data structures that are addressed by
two pointers, the System Configuration Pointer
(SCP) and the Intermediate System Configuration
Pointer (ISCP). The initialization procedure begins
when a Channel Attention signal is asserted after
RESET. The 82596 uses the address of the double
word
that
contains
the
00FFFFF4h. Before the CA signal is asserted this
default address can be changed to any other avail-
able address by asserting the PORT pin and provid-
ing the desired address over the D
31
–D
4
pins of the
address bus. Pins D
3
–D
0
must be 0010; i.e., any
alternative address must be aligned to 16 byte
boundaries. All addresses sent to the 82596 must be
word aligned, which means that all pointers and
memory structures must start on an even address
(A
0
e
zero).
SCP
as
a
defaultD
SYSTEM CONFIGURATION POINTER
(SCP)
The SCP contains the SYSBUS byte and the loca-
tion of the next structure of the initialization process,
the ISCP. The following parameters are selected in
the SYSBUS.
#
The 82596 operation mode.
#
The Bus Throttle timer triggering method.
#
Lock enabled.
#
Interrupt polarity.
#
Big Endian 32-bit entity mode.
Byte ordering is determined by the LE/BE pin.
LE/BE
e
1 selects little endian byte ordering and
LE/BE
e
0 selects big endian byte ordering.
NOTE:
In the following, X indicates a bit not checked in
82586 mode. This bit must be set to 0 in all other
modes.
24
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