参数资料
| 型号： | AD5522JSVDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 46/64页 |
| 文件大小： | 0K |
| 描述： | IC PMU QUAD 16BIT DAC 80-TQFP |
| 产品变化通告： | Improve FI ac crosstalk |
| 设计资源： | Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104) |
| 标准包装： | 1 |
| 类型： | 每引脚参数测量单元（PPMU） |
| 应用： | 自动测试设备 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-TQFP 裸露焊盘 |
| 供应商设备封装： | 80-TQFP（12x12） |
| 包装： | 托盘 |
| 产品目录页面： | 798 (CN2011-ZH PDF) |
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AD5522
Data Sheet
Rev. E | Page 50 of 64
WRITE DAC REGISTER
The DAC input, gain, and offset registers are addressed through
a combination of PMU bits (Bit 27 to Bit 24) and mode bits
(Bit 23 and Bit 22). Bit A5 to Bit A0 address each DAC level on
chip. Bit D15 to Bit D0 are the DAC data bits used when writing
to these registers. The PMU address bits allow addressing of a
particular DAC for any combination of PMU channels.
Table 27. DAC Register Bits
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15 to B0
RD/WR
PMU3
PMU2
PMU1
PMU0
MODE1
MODE0
A5
A4
A3
A2
A1
A0
Data Bits[D15 (MSB):D0 (LSB)]
Table 28. DAC Register Functions
Bit
Bit Name
Description
28 (MSB)
RD/WR
When this bit is low, a write function takes place to the selected register; setting the RD/WR bit high initiates a
readback sequence of the PMU, alarm status, comparator status, system control, or DAC register, as determined
by the address bits.
27
PMU3
Bit PMU3 to Bit PMU0 address each PMU and DAC channel in the device. These bits allow control of each
individual DAC channel or any combination of channels, in addition to multichannel programming.
26
PMU2
25
PMU1
24
PMU0
23
MODE1
The MODE1 and MODE0 bits allow addressing of the DAC gain (M), offset (C), or input (X1) register.
22
MODE0
MODE1
MODE0
Action
0
Write to the system control register or the PMU register
0
1
Write to the DAC gain (M) register
1
0
Write to the DAC offset (C) register
1
Write to the DAC input data (X1) register
DAC Register-Specific Bits
21
A5
DAC address bits. The A5 to A3 bits select the register set that is addressed. See the DAC Addressing section.
20
A4
19
A3
18
A2
DAC address bits. The A2 to A0 bits select the DAC that is addressed. See the DAC Addressing section.
17
A1
16
A0
15 to 0
D15 (MSB) to
D0 (LSB)
16 DAC data bits for X1 and C registers. M register is 15 bits wide, D15 to D1.
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相关代理商/技术参数 |
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| AD5522JSVUZ | 功能描述:IC PMU QUAD 16BIT DAC 80-TQFP RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
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| AD5530 | 制造商:AD 制造商全称:Analog Devices 功能描述:Serial Input, Voltage Output 12-/14-Bit DACs |
| AD5530_07 | 制造商:AD 制造商全称:Analog Devices 功能描述:Serial Input, Voltage Output 12-/14-Bit Digital-to-Analog Converters |
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