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参数资料
| 型号： | AD6623PCB |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP |
| 中文描述： | 4通道，104 MSPS的数字传输信号处理器判刑 |
| 文件页数： | 20/40页 |
| 文件大小： | 381K |
| 代理商： | AD6623PCB |
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REV. 0
AD6623
–20–
All of these phase locations are represented in rectangular coor-
dinates by only four unique magnitudes in the positive and negative
directions. These four values are read from four channel registers
that are programmed according to the following table, which
gives the generic formulas and a specific example. The example
is notable because it is only 0.046 dB below full-scale and the
16-bit quantization is so benign at that magnitude, that the rms
error is better than
–
122 dBc. It is also worth noting that because
none of the phases are aligned with the axes, magnitudes slightly
beyond 0.16 dB above full-scale are achievable.
Table VI. Program Registers
Channel
Register
Magnitude M
Magnitude E 0x7F53
0x12
0x13
0x14
0x15
M 3 cos(p/16)
M 3 cos(3p/16)
M 3 cos(5p/16)
M 3 cos(7p/16)
0x7CE1
0x69DE
0x46BD
0x18D7
Using the four channel registers from the preceding table, the PSK
Modulator assembles the 16 phases according to Table VII.
Table VII. PSK Modulator Phase
Phase
I Value
Q Value
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0x12
0x13
0x14
0x15
–
0x15
–
0x14
–
0x13
–
0x12
–
0x12
–
0x13
–
0x14
–
0x15
0x15
0x14
0x13
0x12
0x15
0x14
0x13
0x12
0x12
0x13
0x14
0x15
–
0x15
–
0x14
–
0x13
–
0x12
–
0x12
–
0x13
–
0x14
–
0x15
The following three sections show how the phase values are
created for each PSK modulation mode.
/4-DQPSK Modulation
IS-136 compliant /4-DQPSK modulation is selected by setting
the channel register 0x0C: 6
–
4 to 001b. The phase word is calculated
according to the following diagram. The two LSBs
of the serial
input word update the payload bits once per symbol.
The
QPSK
Mapper creates a data dependent static phase word (Sph)
which
is added to a time dependent rotating phase word (Rph). The Rph
starts at zero when the RCF is reset or
switches modes via a sync
pulse. Otherwise, the Rph increments
by two on every symbol.
SERIAL
QPSK
MAPPER
SPH
[1:0]
[3:0]
PHASE
[3:0]
[3:0]
RPH
2
Figure 22. QPSK Mapper
The Sph word is calculated by the QPSK Mapper according to
the following truth table.
Table VIII. QPSK Mapper Truth Table
Serial [1:0]
Sph [3:0]
00b
01b
11b
10b
0
4
8
12
8-PSK Modulation
IS-136+ compliant 8-PSK modulation is selected by setting the
channel register 0x0C: 6
–
4 to 101b. The Phase word is calculated
according to the following diagram. The three LSBs of the serial
input word update the payload bits once per symbol.
SERIAL
8PSK
MAPPER
[2:0]
PHASE
[3:0]
Figure 23. 8-PSK Mapper
The Phase word is calculated by the 8-PSK Mapper according
to the following truth table:
Table IX. 8-PSK Mapper Truth Table
Serial [2:0]
Sph [3:0]
111b
011b
010b
000b
001b
101b
100b
110b
0
2
4
6
8
10
12
14
3 /8-8-PSK Modulation
EDGE compliant 3 /8-8-PSK modulation is selected by setting the
channel register 0x0C: 6
–
4 to 110b. The phase word is calculated
according to the following diagram. The three LSBs of the serial
input word update the payload bits once per symbol. The 8-PSK
Mapper creates a data-dependent static phase word (Sph) which is
added to a time-dependent rotating phase word (Rph). The 8-PSK
Mapper operates exactly as described in the
preceding 8-PSK
Modulation section. The Rph starts at zero when
the RCF is reset
or switches modes via a sync pulse. Otherwise, the Rph increments
by three on every symbol.
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