参数资料
| 型号： | AD7294BCPZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/49页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT I2C/SRL 1M 56LFCSP |
| 标准包装： | 2,500 |
| 类型： | ADC，DAC |
| 分辨率（位）： | 12 b |
| 采样率（每秒）： | 22.22k |
| 数据接口： | I²C，串行 |
| 电压电源： | 模拟和数字 |
| 电源电压： | 4.4 V ~ 5.5 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 56-LFCSP-VQ（8x8） |
| 包装： | 带卷 (TR) |
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AD7294
Data Sheet
Rev. H | Page 12 of 48
Table 7. Pin Function Descriptions
TQFP Pin No.
LFCSP Pin No.
Mnemonic
Description
2, 61
1, 54
RS2(), RS1()
Connection for External Shunt Resistor.
3, 60
2, 53
RS2(+), RS1(+)
Connection for External Shunt Resistor.
1, 4, 16, 17, 32,
33, 59, 64
3, 52
NC
No Connection. Do not connect these pins.
5, 8, 14, 25, 56, 57
4, 7, 13, 22, 50
AV
DD1 to AVDD6
for TQFP; AV
DD1
to AV
DD4 for
LFCSP
Analog Supply Pins. The operating range is 4.5 V to 5.5 V. These pins provide
the supply voltage for all the analog circuitry on the AD7294. Connect the
AV
DD and DVDD pins together to ensure that all supply pins are at the same
potential. This supply should be decoupled to AGND with one 10 F tantalum
capacitor and a 0.1 F ceramic capacitor for each AV
DD pin.
6, 7, 13, 24, 34,
55, 58
5, 6 12, 21, 29, 49,
51
AGND1 to
AGND7
Analog Ground. Ground reference point for all analog circuitry on the AD7294.
Refer all analog input signals and any external reference signal to this AGND
voltage. Connect all seven of these AGND pins to the AGND plane of the
system. Note that AGND5 is a DAC ground reference point and should be used
as a star ground for circuitry being driven by the DAC outputs. Ideally, the
AGND and DGND voltages should be at the same potential and must not be
more than 0.3 V apart, even on a transient basis.
9, 12
8, 11
D2(), D1()
Temperature Sensor Analog Input. These pins are connected to the external
temperature sensing transistor. See Figure 46 and Figure 47.
10, 11
9, 10
D2(+), D1(+)
Temperature Sensor Analog Input. These pins are connected to the external
temperature sensing transistor. See Figure 46 and Figure 47.
15
14
REF
OUT/REFIN DAC
DAC Reference Output/Input Pin. The REF
OUT/REFIN DAC pin is common to all
four DAC channels. On power-up, the default configuration of this pin is
external reference (REF
IN). Enable the internal reference by writing to the
power-down register; see Table 27. Decoupling capacitors (220 nF
recommended) are connected to this pin to decouple the reference buffer.
Provided the output is buffered, the on-chip reference can be taken from this
pin and applied externally to the rest of a system. A maximum external
reference voltage of AV
DD 2 V can be supplied to the REFOUT portion of the
REF
OUT/REFIN DAC pin.
18, 23, 26, 31
15, 20 23,28
OFFSET IN A to
OFFSET IN D
DAC Analog Offset Input Pins. These pins set the desired output range for each
DAC channel. The DACs have an output voltage span of 5 V, which can be
shifted from 0 V to 5 V to a maximum output voltage of 10 V to 15 V by
supplying an offset voltage to these pins. These pins can be left floating, in
which case decouple them to AGND with a 100 nF capacitor.
19, 22, 27, 30
16, 19, 24, 27
V
OUT A to VOUT D
Buffered Analog DAC Outputs for Channel A to Channel D. Each DAC analog
output is driven from an output amplifier that can be offset using the OFFSET
IN x pin. The DAC has a maximum output voltage span of 5 V that can be level
shifted to a maximum output voltage level of 15 V. Each output is capable of
sourcing and sinking 10 mA and driving a 10 nF load.
20, 29
17, 26
DAC OUT GND
AB, DAC OUT
GND CD
Analog Ground. Analog ground pins for the DAC output amplifiers on V
OUTA
and V
OUTB, and VOUTC and VOUTD, respectively.
21, 28
18, 25
DAC OUTV+ AB,
DAC OUTV+ CD
Analog Supply. Analog supply pins for the DAC output amplifiers on V
OUTA and
V
OUTB, and VOUTC and VOUTD, respectively. The operating range is 4.5 V to 16.5 V.
35
30
ALERT/BUSY
Digital Output. Selectable as an alert or busy output function in the
configuration register. This is an open-drain output. An external pull-up
resistor is required.
When configured as an alert, this pin acts as an out-of-range indicator and
becomes active when the conversion result violates the DATA
HIGH or DATALOW
register values. See the Alert Status Registers section.
When configured as a busy output, this pin becomes active when a conversion
is in progress.
38, 37, 36
33, 32, 31
AS0, AS1, AS2
Digital Logic Input. Together, the logic state of these inputs selects a unique
39
34
SDA
Digital Input/Output. Serial bus bidirectional data; external pull-up resistor
required.
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