参数资料
| 型号： | AD9558BCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 101/104页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK TRANSLATOR 64LFCSP |
| 产品变化通告： | AD9558 Minor Metal Mask Change 17/Apr/2012 |
| 标准包装： | 1 |
| 类型： | 时钟/频率转换器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH，Stratum |
| 输入： | CMOS，LVDS，LVPECL |
| 输出： | CMOS，HSTL，LVDS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 4:6 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 1.25GHz |
| 电源电压： | 1.71 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页当前第101页第102页第103页第104页
AD9558
Data Sheet
Rev. B | Page 96 of 104
DPLL Status, Input Reference Status, Holdover History, and DPLL Lock Detect Tub Levels (Register 0x0D08 to Register 0x0D14)
Table 108. DPLL Status1
Address
Bits
Bit Name
Description
0x0D08
7
Reserved
6
Offset slew limiting
The current closed-loop phase offset is rate limited
5
Frequency lock
The DPLL has achieved frequency lock
4
Phase lock
The DPLL has achieved phase lock
3
Loop switching
The DPLL is in the process of a reference switchover
2
Holdover
The DPLL is in holdover mode
1
Active
The DPLL is active (that is, operating in a closed-loop condition)
0
Freerun
The DPLL is free run (that is, operating in an open-loop condition)
0x0D09
[7:6]
Reserved
Default: 0b
5
Frequency clamped
The upper or lower frequency tuning word clamp is in effect
4
History available
There is sufficient tuning word history available for holdover operation
[3:2]
Active reference priority
Priority value of the currently active reference
00 = highest priority
…
11 = lowest priority
[1:0]
Current active reference
Index of the currently active reference
00 = Reference A
01 = Reference B
10 = Reference C
11 = Reference D
1
Note that the user must issue an I/O update by writing 0x01 to Register 0x0005 to update the status of these registers.
Table 109. Reserved Register
Address
Bits
Bit Name
Description
0x0D0A
[7:0]
Reserved
Reserved.
Table 110. Input Reference Status1
Address
Bits
Bit Name
Description
0x0D0B
7
B valid
REFB is valid for use. (It is unfaulted, and its validation timer has expired.)
6
B fault
REFB is not valid for use.
5
B fast
This bit indicates that the frequency of REFB is higher than allowed by its profile settings.
4
B slow
This bit indicates that the frequency of REFB is lower than allowed by its profile settings.
3
A valid
REFA is valid for use. (It is unfaulted, and its validation timer has expired.)
2
A fault
REFA is not valid for use.
1
A fast
This bit indicates that the frequency of REFA is higher than allowed by its profile settings.
0
A slow
This bit indicates that the frequency of REFA is lower than allowed by its profile settings.
0x0D0C
[7:4]
Same as Register 0xDOB[7:4] but for REFD instead of REFB .
[3:0]
Same as Register 0xDOB[3:0] but for REFC instead of REFA.
1
Note that the user must issue an I/O update by writing 0x01 to Register 0x0005 to update the status of these registers.
Table 111. Holdover History1
Address
Bits
Bit Name
Description
0x0D0D
[7:0]
Holdover history
Tuning word readback bits[7:0]
0x0D0E
[7:0]
Tuning word readback bits[15:8]
0x0D0F
[7:0]
Tuning word readback bits[23:9]
0x0D10
[7:0]
Tuning word readback bits[29:24]
1
Note that these registers contain the current 30-bit DCO frequency tuning word generated by the tuning word history logic.
相关PDF资料 |
PDF描述 |
|---|---|
| AD9557BCPZ | IC CLOCK TRANSLATOR 40LFCSP |
| V375C36M150BG | CONVERTER MOD DC/DC 36V 150W |
| AD9547BCPZ | IC CLOCK GEN/SYNCHRONIZR 64LFCSP |
| D38999/20MF11JN | CONN RCPT 11POS WALL MNT W/SCKT |
| AD9549ABCPZ | IC CLOCK GEN/SYNCHRONIZR 64LFCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9558BCPZ-REEL7 | 功能描述:IC CLK XLATR PLL 1250MHZ 64LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| AD9559 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator |
| AD9559/PCBZ | 功能描述:时钟和定时器开发工具 Multi-protocol line card dual clock RoHS:否 制造商:Texas Instruments 产品:Evaluation Modules 类型:Clock Conditioners 工具用于评估:LMK04100B 频率:122.8 MHz 工作电源电压:3.3 V |
| AD9559BCPZ | 功能描述:时钟发生器及支持产品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| AD9559BCPZ-REEL7 | 功能描述:时钟发生器及支持产品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
发布紧急采购，3分钟左右您将得到回复。