- 您现在的位置：买卖IC网 > PDF目录17103 > AD9785-DPG2-EBZ (Analog Devices Inc)BOARD EVALUATION FOR AD9785 PDF资料下载
参数资料
| 型号： | AD9785-DPG2-EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/64页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD9785 |
| 标准包装： | 1 |
| 系列： | TxDAC® |
| DAC 的数量： | 2 |
| 位数： | 12 |
| 采样率（每秒）： | 800M |
| 数据接口： | 串行 |
| 设置时间： | 22ms |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 85°C |
| 已供物品： | 板，缆线，CD |
| 已用 IC / 零件： | AD9785 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页
AD9785/AD9787/AD9788
Rev. A | Page 23 of 64
Instruction Byte
The instruction byte contains the following information as
shown in the instruction byte bit map.
Instruction Byte Information Bit Map
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
R/W
X
A4
A3
A2
A1
A0
R/W—Bit 7 of the instruction byte determines whether a read
or write data transfer occurs after the instruction byte write.
Logic 1 indicates a read operation. Logic 0 indicates a write
operation.
X, X —Bit 6 and Bit 5 of the instruction byte are don’t care. In
previous TxDACs, such as the AD9779, these bits define the
number of registers written to or read from in an SPI read/write
operation. In the AD9785/AD9787/AD9788, the register itself
now defines how many bytes are written to or read from.
A4, A3, A2, A1, A0—Bit 4, Bit 3, Bit 2, Bit 1, and Bit 0 of the
instruction byte determine which register is accessed during the
data transfer portion of the communication cycle.
Serial Interface Port Pin Description
SCLK—Serial Clock
The serial clock pin is used to synchronize data to and from the
AD9785/AD9787/AD9788 and to run the internal state machines.
SCLK maximum frequency is 40 MHz.
SPI_CSB—Chip Select
Active low input that allows more than one device on the same
serial communications line. The SPI_SDO and SPI_SDIO pins
go to a high impedance state when this input is high. If driven
high during any communication cycle, that cycle is suspended
until SPI_CSB is reactivated low. Chip select can be tied low in
systems that maintain control of SCLK.
SPI_SDIO—Serial Data I/O
Data is always written into the AD9785/AD9787/AD9788 on
this pin. However, this pin can be used as a bidirectional data
line. Bit 7 of Register 0x00 controls the configuration of this pin.
The default is Logic 0, which configures the SPI_SDIO pin for
input only (4-wire) operation.
SPI_SDO—Serial Data Output
Data is read from this pin for protocols that use separate lines
for transmitting and receiving data. In the case where the
AD9785/AD9787/AD9788 operate in a single bidirectional
I/O mode, this pin does not output data and is set to a high
impedance state.
MSB/LSB Transfers
The AD9785/AD9787/AD9788 serial port can support both
most significant bit (MSB) first or least significant bit (LSB)
first data formats. This functionality is controlled by Bit 6 of the
communication (COMM) register. The default value of COMM
Register Bit 6 is low (MSB first). When COMM Register Bit 6 is
set high, the serial port is in LSB first format. The instruction byte
must be written in the format indicated by COMM Register Bit 6.
That is, if the device is in LSB first mode, the instruction byte
must be written from least significant bit to most significant bit.
For MSB first operation, the serial port controller generates the
most significant byte (of the specified register) address first,
followed by the next lesser significant byte addresses until the
I/O operation is complete. All data written to or read from the
AD9785/AD9787/AD9788 must be in MSB first order.
If the LSB mode is active, the serial port controller generates the
least significant byte address first, followed by the next greater
significant byte addresses until the I/O operation is complete.
All data written to or read from the AD9785/AD9787/AD9788
must be in LSB first order.
SPI Resynchronization Capability
If the SPI port becomes unsynchronized at any time, toggling
SCLK for eight or more cycles with SPI_CSB held high resets
the SPI port state machine. The device is then ready for the next
register read or write access.
相关PDF资料 |
PDF描述 |
|---|---|
| EEM36DTMD-S189 | CONN EDGECARD 72POS R/A .156 SLD |
| EEM36DTMH-S189 | CONN EDGECARD 72POS R/A .156 SLD |
| 0210390421 | CABLE FLAT FLEX 1.18" 1MM 26POS |
| EVAL-AD5791SDZ | BOARD EVAL FOR AD5791 |
| VE-J2R-EZ | CONVERTER MOD DC/DC 7.5V 25W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9785-EBZ | 制造商:Analog Devices 功能描述:Evaluation Board For AD9785 制造商:Analog Devices 功能描述:DUAL 12B, 1GSPS D-A CONVERTER - Bulk 制造商:Analog Devices 功能描述:Digital to Analog Eval. Board |
| AD9786 | 制造商:AD 制造商全称:Analog Devices 功能描述:16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing |
| AD9786BSV | 制造商:Analog Devices 功能描述:DAC 1-CH Interpolation Filter 16-bit 80-Pin TQFP EP 制造商:Analog Devices 功能描述:IC 16BIT DAC SMD 9786 TQFP80 |
| AD9786BSVRL | 制造商:Analog Devices 功能描述:DAC 1-CH Interpolation Filter 16-bit 80-Pin TQFP EP T/R |
| AD9786BSVZ | 功能描述:IC DAC 16BIT INTERPOL/SP 80TQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:TxDAC+® 标准包装:1 系列:- 设置时间:4.5µs 位数:12 数据接口:串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOICN 包装:剪切带 (CT) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:* 其它名称:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
发布紧急采购，3分钟左右您将得到回复。