参数资料
型号: ADE5566ASTZF62-RL
厂商: Analog Devices Inc
文件页数: 46/156页
文件大小: 0K
描述: IC ENERGY METERING 1PHASE 64LQFP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 1,500
输入阻抗: 770 千欧
测量误差: 0.1%
电压 - 高输入/输出: 2V
电压 - 低输入/输出: 0.8V
电源电压: 2.4 V ~ 3.7 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 带卷 (TR)
ADE5166/ADE5169/ADE5566/ADE5569
Table 40. Calibration Mode Register (CALMODE, Address 0x3D) 1
Data Sheet
Bit
[7:6]
[5:4]
3
2
[1:0]
Mnemonic
Reserved
SEL_I_CH
V_CH_SHORT
I_CH_SHORT
Reserved
Default
00
00
0
0
00
Description
These bits must be kept at 0 for proper operation.
These bits define the current channel used for energy measurements.
SEL_I_CH
Result
00
Current channel automatically selected by the tampering condition
01
Current channel connected to I PA
10
Current channel connected to I PB
11
Current channel automatically selected by the tampering condition
Logic 1 shorts the voltage channel to ground.
Logic 1 shorts the current channel to ground.
These bits must be kept at 0 for proper operation.
1
This register is not available in the ADE5566 and ADE5569.
INTERRUPT STATUS/ENABLE SFRS
Table 41. Interrupt Status 1 SFR (MIRQSTL, Address 0xDC)
Bit
7
6
5
4
3
2
1
0
Interrupt Flag
ADEIRQFLAG
Reserved
FAULTSIGN 1
VARSIGN 2
APSIGN
VANOLOAD
RNOLOAD 2
APNOLOAD
Description
This bit is set if any of the ADE status flags that are enabled to generate an ADE interrupt is set. This bit is
automatically cleared when all of the enabled ADE status flags are cleared.
Reserved.
Logic 1 indicates that the fault mode has changed according to the configuration of the ACCMODE register.
Logic 1 indicates that the reactive power sign has changed according to the configuration of the ACCMODE register.
Logic 1 indicates that the active power sign has changed according to the configuration of the ACCMODE register.
Logic 1 indicates that an interrupt has been caused by apparent power no load detection. This interrupt is also
used to reflect that the part is entering the I rms no load mode.
Logic 1 indicates that an interrupt has been caused by reactive power no load detection.
Logic 1 indicates that an interrupt has been caused by active power no load detection.
1
2
This function is not available in the ADE5566 and ADE5569.
This function is not available in the ADE5166 and ADE5566.
Table 42. Interrupt Status 2 SFR (MIRQSTM, Address 0xDD)
Bit
7
6
5
4
3
2
1
0
Interrupt Flag
CF2
CF1
VAEOF
REOF 1
AEOF
VAEHF
REHF 1
AEHF
Description
Logic 1 indicates that a pulse on CF2 has been issued. The flag is set even if the CF2 pulse output is not
enabled by clearing Bit 2 of the MODE1 register.
Logic 1 indicates that a pulse on CF1 has been issued. The flag is set even if the CF1 pulse output is not
enabled by clearing Bit 1 of the MODE1 register.
Logic 1 indicates that the VAHR register has overflowed.
Logic 1 indicates that the VARHR register has overflowed.
Logic 1 indicates that the WATTHR register has overflowed.
Logic 1 indicates that the VAHR register is half full.
Logic 1 indicates that the VARHR register is half full.
Logic 1 indicates that the WATTHR register is half full.
1
This function is not available in the ADE5166 or ADE5566.
Table 43. Interrupt Status 3 SFR (MIRQSTH, Address 0xDE)
Bit
7
6
5
4
3
2
1
0
Interrupt Flag
RESET
Reserved
WFSM
PKI
PKV
CYCEND
ZXTO
ZX
Description
Indicates the end of a reset (for both software and hardware reset).
Reserved.
Logic 1 indicates that new data is present in the waveform registers (Address 0xE2 to Address 0xE7).
Logic 1 indicates that the current channel has exceeded the IPKLVL value.
Logic 1 indicates that the voltage channel has exceeded the VPKLVL value.
Logic 1 indicates the end of the energy accumulation over an integer number of half-line cycles.
Logic 1 indicates that no zero crossing on the line voltage occurred for the last ZXTOUT half-line cycles.
Logic 1 indicates detection of a zero crossing in the voltage channel.
Rev. D | Page 46 of 156
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