参数资料
型号: ADP3198JCPZ-RL
厂商: ON Semiconductor
文件页数: 1/31页
文件大小: 0K
描述: IC BUCK CTRLR 8BIT PROG 40LFCSP
产品变化通告: MFG CHG Notification ADI to ON Semi
标准包装: 2,500
应用: 控制器,Intel VRM
输入电压: 12V
输出数: 4
输出电压: 0.5 V ~ 1.6 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘,CSP
供应商设备封装: 40-LFCSP-VQ(6x6)
包装: 带卷 (TR)
8-Bit Programmable 2- to 4-Phase
Synchronous Buck Controller
ADP3198
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Selectable 2-, 3-, or 4-phase operation at up to
1 MHz per phase
±11 mV worst-case differential sensing error over
temperature
Logic-level PWM outputs for interface to external high
power drivers
Enhanced PWM flex mode for excellent load transient
GND 18
EN 1
850mV
VCC
31
SHUNT
REGULATOR
UVLO
SHUTDOWN
+
RT RAMPADJ
12 13
OSCILLATOR
+
CMP
+
CMP
SET EN
RESET
RESET
19
30
29
OD
PWM1
PWM2
28 PWM3
2/3/4-PHASE
performance
Active current balancing between all output phases
Built-in power-good/crowbar blanking supports on-the-fly
VID code changes
Digitally programmable 0.5 V to 1.6 V output supports both
PWRGD
2
DAC
+ 150mV
CSREF
DAC
– 500mV
DELAY
+
+
CMP RESET
+ DRIVER LOGIC 27 PWM4
CMP RESET
CURRENT
LIMIT
CROWBAR
VR10.x and VR11 specifications
Programmable short-circuit protection with programmable
latch-off delay
TTSENSE 10
VRHOT 9
VRFAN 8
THERMAL
THROTTLING
CONTROL
25
24
23
22
SW1
SW2
SW3
SW4
APPLICATIONS
Desktop PC power supplies for next generation
ILIMIT 11
DELAY 7
CURRENT
MEASUREMENT
AND LIMIT
+
17
15
16
21
CSCOMP
CSREF
CSSUM
IMON
Intel? processors
IREF 20
VRM modules
COMP
5
PRECISION
REFERENCE
4
14
FB
LLSET
GENERAL DESCRIPTION
The ADP3198 1 is a highly efficient, multiphase, synchronous buck
switching regulator controller optimized for converting a 12 V
FBRTN 3
VIDSEL 40
VID DAC
BOOT
VOLTAGE
AND
SOFT START
CONTROL
ADP3198
6
SS
main supply into the core supply voltage required by high per-
formance Intel processors. It uses an internal 8-bit DAC to read
a voltage identification (VID) code directly from the processor,
which is used to set the output voltage between 0.5 V and 1.6 V.
This device uses a multimode PWM architecture to drive the
logic-level outputs at a programmable switching frequency that
can be optimized for VR size and efficiency. The phase relation-
ship of the output signals can be programmed to provide 2-, 3-,
or 4-phase operation, allowing for the construction of up to
four complementary buck switching stages.
The ADP3198 also includes programmable no load offset and
slope functions to adjust the output voltage as a function of the
load current, optimally positioning it for a system transient. The
ADP3198 also provides accurate and reliable short-circuit
protection, adjustable current limiting, and a delayed power-
good output that accommodates on-the-fly output voltage
changes requested by the CPU.
32 33 34 35 36 37 38 39
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0
Figure 1.
The ADP3198 has a built-in shunt regulator that allows the part
to be connected to the 12 V system supply through a series resistor.
The ADP3198 is specified over the extended commercial
temperature range of 0°C to 85°C and is available in a
40-lead LFCSP.
1
Protected by U.S. Patent Number 6,683,441; other patents pending.
?2008 SCILLC. All rights reserved.
January 2008 – Rev. 2
Publication Order Number:
ADP3198/D
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