参数资料
型号: BQ4014YMB-120
厂商: Texas Instruments
文件页数: 6/14页
文件大小: 0K
描述: IC NVSRAM 2MBIT 120NS 32DIP
标准包装: 15
格式 - 存储器: RAM
存储器类型: NVSRAM(非易失 SRAM)
存储容量: 2M (256K x 8)
速度: 120ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
封装/外壳: 32-DIP 模块(0.61",15.49mm)
供应商设备封装: 32-DIP 模块(18.42x52.96)
包装: 管件
bq4014/bq4014Y
Write Cycle
(TA = 0 to 70°C, VCCmin ≤ VCC ≤ VCCmax)
-85
-120
Symbol
Parameter
Min.
Max.
Min.
Max. Units
Conditions/Notes
t WC
Write cycle time
85
-
120
-
ns
t CW
t AW
t AS
t WP
t WR1
t WR2
t DW
t DH1
t DH2
t WZ
t OW
Chip enable to end of write
Address valid to end of write
Address setup time
Write pulse width
Write recovery time
(write cycle 1)
Write recovery time
(write cycle 2)
Data valid to end of write
Data hold time
(write cycle 1)
Data hold time
(write cycle 2)
Write enabled to output in
high Z
Output active from end of
write
75
75
0
65
5
15
35
0
10
0
0
-
-
-
-
-
-
-
-
-
30
-
100
100
0
85
5
15
45
0
10
0
0
-
-
-
-
-
-
-
-
-
40
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1)
(1)
Measured from address valid to
beginning of write. (2)
Measured from beginning of write to
end of write. (1)
Measured from WE going high to end
of write cycle. (3)
Measured from CE going high to end
of write cycle. (3)
Measured to first low-to-high
transition of either CE or WE.
Measured from WE going high to end
of write cycle. (4)
Measured from CE going high to end
of write cycle. (4)
I/O pins are in output state. (5)
I/O pins are in output state. (5)
Notes:
1. A write ends at the earlier transition of CE going high and WE going high.
2. A write occurs during the overlap of a low CE and a low WE. A write begins at the later transition
of CE going low and WE going low.
3. Either t WR1 or t WR2 must be met.
4. Either t DH1 or t DH2 must be met.
5. If CE goes low simultaneously with WE going low or after WE going low, the outputs remain in
high-impedance state.
Sept. 1992
6
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