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参数资料
| 型号： | CS4103VHG |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | IEEE P1394a Physical Layer Device |
| 中文描述： | 3 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP80 |
| 封装： | LQFP-80 |
| 文件页数： | 3/24页 |
| 文件大小： | 423K |
| 代理商： | CS4103VHG |
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The Geode CS4301 can be described as providing the
functional blocks as shown in Figure 1-1 and described in
the following subsections.
Architectural Overview
1.1
The Link Interface implements the PHY-Link Interface as
specified in clause 5, revision 2.0 of the P1394a specifica-
tion. It handles both differentiated and undifferentiated
modes of operation. It decodes LREQ requests and com-
municates with the Arbiter and Register Set for bus
LINK INTERFACE
requests and register read/write commands, respectively.
In addition to receiving LREQ requests, the Link Interface
handles the bidirectional control and data buses for packet
transmission and reception as well as register reads. The
Link Interface uses the Link Power Status input (LPS) sig-
nal to determine the operational state of the Geode
CS4210 OHCI Controller and for resetting, disabling, and/
or restoring the PHY-Link Interface. The Link Interface also
controls the Link-On output (LNKON), used to signal the
CS4210 when the PHY-Link Interface is not active.
Figure 1-1. Functional Block Diagram
Link Interface
Register
Set
Arbiter
Port State
Transceiver
Receiver
Transmitter
PLL
Transceiver
Transceiver
LPS
SCLK
LREQ
DATA[0:7]
CTRL[0:1]
LNKON
DIRECT
Packet
Processor
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