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参数资料
| 型号： | DC1663A |
| 厂商： | Linear Technology |
| 文件页数： | 13/36页 |
| 文件大小： | 0K |
| 描述： | DEMO BOARD LTM4628 |
| 软件下载： | LTM4628 Spice Model |
| 设计资源： | LTM4628 Gerber Files DC1663A Design Files |
| 标准包装： | 1 |
| 系列： | µModule® |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 1.2V，1.5V |
| 电流 - 输出： | 8A，8A |
| 输入电压： | 4.5 ~ 26.5 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 400kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTM4628 |
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LTM4628
APPLICATIONS INFORMATION
Pulse-Skipping Mode Operation
In applications where low output ripple and high efficiency
at intermediate currents are desired, pulse-skipping
mode should be used. Pulse-skipping operation allows
the LTM4628 to skip cycles at low output loads, thus
increasing efficiency by reducing switching loss. Tying
the MODE_PLLIN pin to INTV CC enables pulse-skipping
operation. At light loads the internal current comparator
may remain tripped for several cycles and force the top
MOSFET to stay off for several cycles, thus skipping cycles.
The inductor current does not reverse in this mode. This
mode will maintain higher effective frequencies thus lower
output ripple and lower noise than Burst Mode operation.
Either regulator can be configured for pulse-skipping mode.
Forced Continuous Operation
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
output ripple is desired, forced continuous operation
should be used. Forced continuous operation can be
enabled by tying the MODE_PLLIN pin to SGND. In this
mode, inductor current is allowed to reverse during low
output loads, the COMP voltage is in control of the current
comparator threshold throughout, and the top MOSFET
always turns on with each oscillator pulse. During start-up,
forced continuous mode is disabled and inductor current
is prevented from reversing until the LTM4628’s output
voltage is in regulation. Either regulator can be configured
for forced continuous mode.
Multiphase Operation
For output loads that demand more than 8A of current,
two outputs in LTM4628 or even multiple LTM4628s can
be paralleled to run out of phase to provide more output
current without increasing input and output voltage ripple.
The MODE_PLLIN pin allows the LTM4628 to synchronize
to an external clock (between 400kHz and 780kHz) and
the internal phase-locked loop allows the LTM4628 to lock
0 PHASE
SGND OR FLOAT
2-PHASE DESIGN
FLOAT
CLKOUT
MODE_PLLIN
V OUT1 V OUT2
PHASMD
180 PHASE
PHASMD PIN STATUS AND CORRESPONDING
PHASE RELATIONSHIP
PHASMD SGND FLOAT INTV CC
CONTROLLER1 0° 0° 0°
CONTROLLER2 180° 180° 240°
CLKOUT 60° 90° 120°
4-PHASE DESIGN
90 DEGREE
CLKOUT
CLKOUT
0 PHASE
FLOAT
MODE_PLLIN
V OUT1
PHASMD
V OUT2
180 PHASE
90 PHASE
FLOAT
MODE_PLLIN
V OUT1
PHASMD
V OUT2
270 PHASE
6-PHASE DESIGN
60 DEGREE
60 DEGREE
CLKOUT
CLKOUT
CLKOUT
0 PHASE
SGND
MODE_PLLIN
V OUT1
PHASMD
V OUT2
180 PHASE
60 PHASE
SGND
MODE_PLLIN
V OUT1
PHASMD
V OUT2
240 PHASE
120 PHASE
FLOAT
MODE_PLLIN
V OUT1
PHASMD
V OUT2
300 PHASE
4628 F03
Figure 3. Examples of 2-Phase, 4-Phase, and 6-Phase Operation with PHASMD Table
4628fe
For more information www.linear.com/LTM4628
13
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