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参数资料
| 型号： | DC1663A |
| 厂商： | Linear Technology |
| 文件页数： | 14/36页 |
| 文件大小： | 0K |
| 描述： | DEMO BOARD LTM4628 |
| 软件下载： | LTM4628 Spice Model |
| 设计资源： | LTM4628 Gerber Files DC1663A Design Files |
| 标准包装： | 1 |
| 系列： | µModule® |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 1.2V，1.5V |
| 电流 - 输出： | 8A，8A |
| 输入电压： | 4.5 ~ 26.5 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 400kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTM4628 |
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LTM4628
APPLICATIONS INFORMATION
onto incoming clock phase as well. The CLKOUT signal
can be connected to the MODE_PLLIN pin of the following
stage to line up both the frequency and the phase of the
entire system. Tying the PHASMD pin to INTV CC , SGND,
or left floating generates a phase difference (between
MODE_PLLIN and CLKOUT) of 120 degrees, 60 degrees,
or 90 degrees respectively. A total of 12 phases can be
cascaded to run simultaneously with respect to each other
by programming the PHASMD pin of each LTM4628 chan-
nel to different levels. Figure 3 shows a 2-phase design,
4-phase design and a 6-phase design example for clock
phasing with the PHASMD table.
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output ca-
pacitors. The RMS input ripple current is reduced by, and
the effective ripple frequency is multiplied by, the number
of phases used (assuming that the input voltage is greater
0.60
than the number of phases used times the output voltage).
The output ripple amplitude is also reduced by the number
of phases used when all of the outputs are tied together
to achieve a single high output current design.
The LTM4628 device is an inherently current mode con-
trolled device, so parallel modules will have very good
current sharing. This will balance the thermals on the
design. Figure 31 shows an example of parallel operation
and pin connection.
Input RMS Ripple Current Cancellation
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current cancel-
lation mathematical derivations are presented, and a graph
is displayed representing the RMS ripple current reduction
as a function of the number of interleaved phases. Figure 4
shows this graph.
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0
0.1 0.15
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY CYCLE (V OUT /V IN )
4628 F04
Figure 4. Input RMS Current Ratios to DC Load Current as a Function of Duty Cycle
4628fe
14
For more information www.linear.com/LTM4628
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