参数资料
型号: DDP3315CQA
厂商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP80
封装: PLASTIC, QFP-80
文件页数: 56/62页
文件大小: 1746K
代理商: DDP3315CQA
ADVANCE INFORMATION
6
Micronas
2. Functional Description
2.1. Display Part
The display part converts the digital YCrCb to analog
RGB (see Fig. 2–1). In case of YCrCb 4:1:1 an interpo-
lation converts the digital input signal to YCrCb 4:2:2
standard format. The 4:2:2 YCrCb signal is processed
by the horizontal scaler. In the luminance processing
path, contrast and brightness adjustments and a vari-
ety of features, such as black level expander and luma
sharpness enhancer, are provided. In the chrominance
path, the CrCb signals are converted to 4:4:4 format
and filtered by a color transient improvement circuit.
The YCrCb signals are converted by a programmable
matrix to RGB color space.
2.1.1. Digital Input Interface
The digital input interface supports
– 16 bit 4:2:2 YCrCb with separate H/V-syncs and
clock (ITU-R-601 format)
– 12 bit 4:1:1 YCrCb with separate H/V-syncs and
clock (ITU-R-601 format)
– 8 bit 4:2:2 YCrCb multiplexed with encoded or sepa-
rate H/V-syncs and clock (ITU-R-656 format)
The data inputs Y0...Y7 and C0...C7 are clocked with
the external clock LLC2. The clock frequency is select-
able between 27 or 32 MHz for 12 and 16 bit data
input and 54 MHz for 8 bit data input. The horizontal
sync pulse at the HS pin should be an active video sig-
nal, which is not vertically blanked.
A clock generator converts the different external line
locked clock rates to a common internal sample rate of
approximately 40.5 MHz, in order to provide a fix
bandwidth for all digital filters. Therefore the input data
is sample rate converted to the common processing
frequency by the horizontal scaler.
2.1.2. Chroma Input
The chroma input signal can either be YCrCb in 4:1:1
or in 4:2:2 format. For the digital signal processing the
time-multiplexed chroma samples will be demulti-
plexed, synchronized with the signal at the HS Pin.
The input formatter accepts either two’s complement
or binary offset code. Also the delay can be adjusted
within a range of ±2 input clocks relative to the luma
signal; this doesn’t effect the chroma multiplex.
Note: Cx
y; x = pixel number; y = bit number
Table 2–1: 4:1:1 chroma format
Pin Name
Pixel Number
1
2
3
4
C7
Cb1
7
Cb1
5
Cb1
3
Cb1
1
C6
Cb1
6
Cb1
4
Cb1
2
Cb1
0
C5
Cr1
7
Cr1
5
Cr1
3
Cr1
1
C4
Cr1
6
Cr1
4
Cr1
2
Cr1
0
Table 2–2: 4:2:2 chroma format
Pin Name
Pixel Number
1
2
3
4
C7
Cb1
7
Cr1
7
Cb3
7
Cr3
7
C6
Cb1
6
Cr1
6
Cb3
6
Cr3
6
C5
Cb1
5
Cr1
5
Cb3
5
Cr3
5
C4
Cb1
4
Cr1
4
Cb3
4
Cr3
4
C3
Cb1
3
Cr1
3
Cb3
3
Cr3
3
C2
Cb1
2
Cr1
2
Cb3
2
Cr3
2
C1
Cb1
1
Cr1
1
Cb3
1
Cr3
1
C0
Cb1
0
Cr1
0
Cb3
0
Cr3
0
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