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参数资料
| 型号： | DR-TRC105-450-EV |
| 厂商： | RFM |
| 文件页数： | 2/67页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION 450MHZ RFM RFIC |
| 标准包装： | 1 |
| 类型： | 收发器 |
| 频率： | 447MHz ~ 451MHz |
| 适用于相关产品： | TRC105 |
| 已供物品： | 2 个板，天线，电池 |
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Table of Contents
1.0 Pin Configuration ..................................................................................................................................... 4
1.1 Pin Description .................................................................................................................................. 4
2.0 Functional Description ............................................................................................................................. 5
2.1 RF Port .............................................................................................................................................. 7
2.2 Transmitter ........................................................................................................................................ 7
2.3 Receiver ............................................................................................................................................ 8
2.4 Crystal Oscillator ............................................................................................................................... 9
2.5 Frequency Synthesizer ...................................................................................................................10
2.6 PLL Loop Filter ................................................................................................................................11
3.0 Operating Modes ...................................................................................................................................11
3.1 Receiving in Continuous Data Mode ...............................................................................................12
3.2 Continuous Mode Data and Clock Recovery ..................................................................................14
3.3 Continuous Mode Start Pattern Detect ...........................................................................................14
3.4 RSSI ................................................................................................................................................15
3.5 Receiving in Buffered Data Mode ...................................................................................................15
3.6 Transmitting in Continuous or Buffered Data Modes ......................................................................17
3.7 IRQ0 and IRQ1 Mapping.................................................................................................................18
3.8 Buffered Clock Output .....................................................................................................................19
3.9 Packet Data Mode...........................................................................................................................19
3.9.1 Fixed Length Packet Mode ....................................................................................................19
3.9.2 Variable Length Packet Mode ...............................................................................................20
3.9.3 Extended Variable Length Packet Mode ...............................................................................20
3.9.4 Packet Payload Processing in Transmit and Receive ...........................................................22
3.9.5 Packet Filtering ......................................................................................................................23
3.9.6 Cyclic Redundancy Check .....................................................................................................23
3.9.7 Manchester Encoding ............................................................................................................24
3.9.8 DC-Balanced Scrambling ......................................................................................................25
3.10 SPI Configuration Interface ...........................................................................................................25
3.11 SPI Data FIFO Interface................................................................................................................27
4.0 Configuration Register Memory Map .....................................................................................................29
4.1 Main Configuration Registers (MCFG) ............................................................................................30
4.2 Interrupt Configuration Registers (IRQCFG)...................................................................................33
4.3 Receiver Configuration Registers (RXCFG) ...................................................................................35
4.4 Start Pattern Configuration Registers (SYNCFG) ...........................................................................38
4.5 Transmitter Configuration Registers (TXCFG) ...............................................................................38
4.6 Oscillator Configuration Register (OSCFG) ....................................................................................39
4.7 Packet Handler Configuration Registers (PKTCFG) .......................................................................39
4.8 Page Configuration Register (PGCFG) ...........................................................................................40
4.9 Low Battery Configuration Registers (LBCFG) ...............................................................................41
5.0 Electrical Characteristics .......................................................................................................................42
5.1 DC Electrical Characteristics ..........................................................................................................42
5.2 AC Electrical Characteristics ...........................................................................................................43
6.0 TRC105 Design-In Steps .......................................................................................................................45
6.1 Determining Frequency Specific Hardware Component Values.....................................................45
6.1.1 SAW Filters and Related Component Values .......................................................................45
6.1.2 Voltage Controlled Oscillator Component Values .................................................................46
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Page 2 of 67
TRC105 - 05/29/13
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