参数资料
型号: DR-TRC105-450-EV
厂商: RFM
文件页数: 53/67页
文件大小: 0K
描述: BOARD EVALUATION 450MHZ RFM RFIC
标准包装: 1
类型: 收发器
频率: 447MHz ~ 451MHz
适用于相关产品: TRC105
已供物品: 2 个板,天线,电池
Pattern of Bits 4..3
00
01
10
11
Regulator Rise/Fall Times
3/3 μs
8.5/8.5 μs
15/15 μs
23/23 μs
OOK Rise/Fall Time
2.5/2 μs
5/3 μs
10/6 μs
20/10 μs
Table 67
It is generally a good practice to set the OOK rise and fall time to about 5% of a bit period to avoid excessive
modulation bandwidth:
t OOK = 50/BR
Where t OOK is the nominal 5% OOK rise/fall time in μs and BR is the bit rate in kb/s. At low OOK data rates the
20/10 μs rise/fall times given in the table above are satisfactory. When operating in the 434 MHz band under ETSI
EN300 220-1 regulations, check the modulation bandwidth carefully at bit rates above 8 kb/s to confirm compli-
ance. For operation in certain parts of the 434 MHz band, the required rise and fall time may be greater than 5%.
6.4 Frequency Synthesizer Channel Programming for FSK Modulation
When using a standard 12.8 MHz reference crystal, the FSK RF channel frequency is:
F RF = 14.4*(75*(P + 1) + S)/(R + 1), with P and S in the range 0 to 255, R in the range 64 to 169
Where F RF is in MHz, and P, S, and R are divider integers with S less than (P + 1). There are two sets of three
registers that hold the values of P, S and R:
Register
MCFG06
MCFG07
MCFG08
MCFG09
MCFG0A
MCFG0B
Divider Parameter
R1
P1
S1
R2
P2
S2
Table 68
MCFG05 bit 0 selects the register set to use with the frequency synthesizer. A 0 value selects register set
MCFG06 - MCFG08 and a 1 value selects register set MCFG09 - MCFG0B . In addition, MCFG00 bits 4..2 select the
VCO operating band as follows:
MCFG00 bits 4..2
000
001
010
011
100
101
Band, MHz
300-330
330-365
365-400
400-440
440-470
470-510
Table 69
The dual register set allows a new frequency to be completely entered in one register set while operating on the
other register set. It is important to load all three divider parameters into a register set before switching control to
it. Otherwise, a transient out-of-band frequency shift can occur. The dual register set facilitates FHSS operation,
as the operating frequency for the next hop can be loaded anytime during the current hop interval, making this
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Page 53 of 67
TRC105 - 05/29/13
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