参数资料
型号: DS1863K
厂商: Maxim Integrated Products
文件页数: 32/62页
文件大小: 0K
描述: KIT EVAL FOR DS1863
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: 电信,无源光学网络(PON)
已用 IC / 零件: DS1863
Burst-Mode PON Controller
With Integrated Monitoring
Lower Memory, Register 6Ah to 6D: Reserved
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
00h
All
N/A
MEMORY TYPE
These registers are reserved. The value when read is 00h.
Lower Memory, Register 6Eh: Status
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
MEMORY TYPE
x000 0x0x b
All
See Below
Volatile
Write
Access
6Eh
N/A
FETG
STATUS
All
SOFT
FETG
N/A
RESERVED
All
TX-F
RESET
All
SOFT
TX-D
N/A
TX-F
STATUS
N/A
RESERVED
N/A
RDYB
bit7
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
bit0
FETG STATUS: Reflects the active state of FETG.
0 = Bias and modulation outputs are enabled.
1 = The FETG output is asserted to disable the bias and modulation outputs.
SOFT FETG:
0 = (Default)
1 = Force the bias and modulation outputs to their off states and asserts the FETG output.
Reserved (Default = 0)
TX-F RESET:
0 = Does not affect the TX-F output (Default).
1 = Resets the latch for the TX-F output.
This bit is self clearing after the reset.
SOFT TX-D: This bit allows a software control that is identical to the TX-D pin. Please see section on
TX-D for further information. It ’ s value is wired OR ’ ed with the logic value on TX-D pin.
0 = Internal TX-D signal is equal to external TX-D pin.
1 = Internal TX-D signal is high.
TX-F STATUS: Reflects the active state of TX-F.
0 = TX-F pin is not active.
1 = TX-F pin is active.
RESERVED (Default = 0)
RDYB: Ready Bar.
0 = V CC is above POA.
1 = V CC is below POA or too low to communicate over the I 2 C bus.
32
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