参数资料
型号: DS21FF42
厂商: DALLAS SEMICONDUCTOR
元件分类: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA300
封装: 27 X 27 MM, BGA-300
文件页数: 89/115页
文件大小: 534K
代理商: DS21FF42
DS21FF42/DS21FT42
75 of 115
RDC2: RECEIVE HDLC DS0 CONTROL REGISTER 2 (Address = 91 Hex)
(MSB)
(LSB)
RDB8
RDB7
RDB6
RDB5
RDB4
RDB3
RDB2
RDB1
SYMBOL
POSITION
NAME AND DESCRIPTION
RDB8
RDC2.7
DS0 Bit 8 Suppress Enable. MSB of the DS0. Set to one to
stop this bit from being used.
RDB7
RDC2.6
DS0 Bit 7 Suppress Enable. Set to one to stop this bit from
being used.
RDB6
RDC2.5
DS0 Bit 6 Suppress Enable. Set to one to stop this bit from
being used.
RDB5
RDC2.4
DS0 Bit 5 Suppress Enable. Set to one to stop this bit from
being used.
RDB4
RDC2.3
DS0 Bit 4 Suppress Enable. Set to one to stop this bit from
being used.
RDB3
RDC2.2
DS0 Bit 3 Suppress Enable. Set to one to stop this bit from
being used.
RDB2
RDC2.1
DS0 Bit 2 Suppress Enable. Set to one to stop this bit from
being used.
RDB1
RDC2.0
DS0 Bit 1 Suppress Enable. LSB of the DS0. Set to one to
stop this bit from being used.
TDC1: TRANSMIT HDLC DS0 CONTROL REGISTER 1 (Address = 92 Hex)
(MSB)
(LSB)
TDS0E
-
TDS0M
TD4
TD3
TD2
TD1
TD0
SYMBOL
POSITION
NAME AND DESCRIPTION
TDS0E
TDC1.7
HDLC DS0 Enable.
0 = use transmit HDLC controller for the FDL.
1 = use transmit HDLC controller for one or more DS0
channels.
-
TDC1.6
Not Assigned. Should be set to 0.
TDS0M
TDC1.5
DS0 Selection Mode.
0 = utilize the TD0 to TD4 bits to select which single DS0
channel to use.
1 = utilize the TCHBLK control registers to select which DS0
channels to use.
TD4
TDC1.4
DS0 Channel Select Bit 4. MSB of the DS0 channel select.
TD3
TDC1.3
DS0 Channel Select Bit 3.
TD2
TDC1.2
DS0 Channel Select Bit 2.
TD1
TDC1.1
DS0 Channel Select Bit 1.
TD0
TDC1.0
DS0 Channel Select Bit 0. LSB of the DS0 channel select.
相关PDF资料
PDF描述
DS21FF42N DATACOM, FRAMER, PBGA300
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