参数资料
型号: DS80C400-FNY+
厂商: Maxim Integrated Products
文件页数: 40/97页
文件大小: 0K
描述: IC MCU 75MHZ 16MB HP 100-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 90
系列: 80C
核心处理器: 8051
芯体尺寸: 8-位
速度: 75MHz
连通性: 1 线,CAN,EBI/EMI,以太网,SIO,UART/USART
外围设备: 电源故障复位,WDT
输入/输出数: 64
程序存储器容量: 64KB(64K x 8)
程序存储器类型: ROM
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 1.62 V ~ 3.6 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 100-LQFP
包装: 托盘
配用: DS80C400-KIT#-ND - EVAL KIT FOR DS80C400
其它名称: DS80C400+FNY
DS80C400+FNY+
DS80C400+FNY+-ND
DS80C400+FNY-ND
DS80C400 Network Microcontroller
45 of 97
Table 8. Data Pointer SFR Locations
DATA POINTER
DPX+DPH+DPL COMBINATION
DPTR0
DPX (93h) + DPH (83h) + DPL (82h)
DPTR1
DPX1 (95h) + DPH1 (85h) + DPL1 (84h)
DPTR2
DPX2 (EBh) + DPH2 (F3h) + DPL2 (F2h)
DPTR3
DPX3 (EDh) + DPH3 (F5h) + DPL3 (F4h)
The active data pointer is selected with the data pointer select bits SEL1 (DPS.3) and SEL (DPS.0). For the SEL1
and SEL bits, the 00b state selects DPTR0, 01b selects DPTR1, 10b selects DPTR2, and 11b selects DPTR3. Any
instructions that reference the DPTR (i.e., MOVX A, @DPTR) use the data pointer selected by the SEL1, SEL bit-
pair combination. To allow for code compatibility with previous dual data pointer microcontrollers, the bits adjacent
to SEL are not implemented so that the INC DPS instruction can still be used to quickly toggle between DPTR0 and
DPTR1 or between DPTR2 and DPTR3.
Unlike the standard 8051, the DS80C400 has the ability to decrement as well as increment the data pointers
without additional instructions. Each data pointer (DPTR0, DPTR1, DPTR2, DPTR3) has an associated control bit
(ID0, ID1, ID2, ID3) that determines whether the INC DPTR operation results in an increment or decrement of the
pointer. When the active data pointer ID (increment/decrement) control bit is clear, the INC DPTR instruction
increments the pointer, whereas a decrement occurs if the active pointer’s ID bit is set when the INC DPTR
instruction is performed.
ID0 = DPS.6
ID1 = DPS.7
ID2 = DPS1.6
ID3 = DPS1.7
Another useful feature of the device is its ability to automatically switch the active data pointer after certain DPTR-
based instructions are executed. This feature can greatly reduce the software overhead associated with data
memory block moves, which toggle between the source and destination registers. The auto-toggle feature does not
toggle between all four data pointers, nor does it allow the user to select which data pointers to toggle between.
When the toggle select bit (TSL;DPS.5) is set to 1, the SEL bit (DPS.0) is automatically toggled every time one of
the DPTR instructions below is executed. Thus, depending upon the state of the SEL1 bit (DPS.3), the active data
pointer toggles the DPTR0, DPTR1 pair or the DPTR2, DPTR3 pair.
Auto-Toggle (if TSL = 1)
INC DPTR
MOV DPTR, #data16
MOV DPTR, #data24
MOVC A, @A+DPTR
MOVX A, @DPTR
MOVX @DPTR, A
As a brief example, if TSL is set to 1, then both data pointers can be updated with two INC DPTR instructions.
Assume that SEL1 = 0 and SEL = 0, making DPTR0 the active data pointer. The first INC DPTR increments
DPTR0 and toggles SEL to 1. The second instruction increments DPTR1 and toggles SEL back to 0.
INC DPTR
As a further enhancement, the DS80C400 provides the ability to automatically increment/decrement the active data
pointer after certain DPTR-based instructions are executed. Copying large blocks of data generally requires that
the source and destination pointers index byte-by-byte through their respective data ranges. The traditional method
for incrementing each pointer is by using the INC DPTR instruction. When the auto-increment/decrement bit
(AID:DPS.4) is set to 1, the active data pointer is automatically incremented or decremented every time one of the
DPTR instructions below is executed.
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