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参数资料
| 型号： | DS80C400-FNY+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 42/97页 |
| 文件大小： | 0K |
| 描述： | IC MCU 75MHZ 16MB HP 100-LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 90 |
| 系列： | 80C |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 75MHz |
| 连通性： | 1 线，CAN，EBI/EMI，以太网，SIO，UART/USART |
| 外围设备： | 电源故障复位，WDT |
| 输入/输出数： | 64 |
| 程序存储器容量： | 64KB（64K x 8） |
| 程序存储器类型： | ROM |
| RAM 容量： | 1K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.62 V ~ 3.6 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 100-LQFP |
| 包装： | 托盘 |
| 配用： | DS80C400-KIT#-ND - EVAL KIT FOR DS80C400 |
| 其它名称： | DS80C400+FNY DS80C400+FNY+ DS80C400+FNY+-ND DS80C400+FNY-ND |
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DS80C400 Network Microcontroller
47 of 97
Table 9. Data Memory Cycle Stretch Values
MD2
MD1
MD0
STRETCH
VALUE
MOVX
MACHINE
CYCLES
APPROXIMATE RD, WR PULSE WIDTH
(IN OSCILLATOR CLOCKS)
(4X/2X = 1
CD1:0 = 00)
(4X/2X = 0
CD1:0 = 00)
(4X/2X = X
CD1:0 = 10)
(4X/2X = X
CD1:0 = 11)
0
0 (Note 1)
2
0.5 tCLK
1 tCLK
2 tCLK
512 tCLK
0
1
1 (Note 2)
3
1 tCLK
2 tCLK
4 tCLK
1024 tCLK
0
1
0
2
4
2 tCLK
4 tCLK
8 tCLK
2048 tCLK
0
1
3
5
3 tCLK
6 tCLK
12 tCLK
3072 tCLK
1
0
4
9
4 tCLK
8 tCLK
16 tCLK
4096 tCLK
1
0
1
5
10
5 tCLK
10 tCLK
20 tCLK
5120 tCLK
1
0
6
11
6 tCLK
12 tCLK
24 tCLK
6144 tCLK
1
7
12
7 tCLK
14 tCLK
28 tCLK
7168 tCLK
Note 1: All internal MOVX operations execute at the 0 stretch setting.
Note 2: Default stretch setting for external MOVX operations following reset, but reset before execution of ROM startup code.
Internal MOVX SRAM
The DS80C400 contains 9kB of SRAM that is physically divided into a 1kB block and an 8kB block. The 1kB block
can be used to support the extended stack-pointer function or can be used as general-purpose MOVX data
memory. The 8kB block is used by the Ethernet MAC as frame-buffer memory for incoming or outgoing packet data
and can, at the same time, be accessed by the DS80C400 as MOVX data memory. While the MAC is in use,
special care should be taken by user software to prevent undesirable MOVX writes from corrupting frame-buffer
memory. The address mapping of the 1kB block and the 8kB block are governed by the internal data-memory
configuration bits (IDM1, IDM0) in the memory control register (MCON;C6h). Note that when the SA bit (ACON.2)
is set, 1kB of the MOVX data memory is accessed by the 10-bit expanded stack pointer. Changing the IDM1:0
configuration bits while SA = 1 does not disrupt the extended stack-pointer function. Internal MOVX memory
accesses do not generate WR or RD strobes.
The DS80C400 contains an additional 256 Bytes of internal SRAM that is used to configure and operate the 15
CAN-controller message centers. The address location of this 256-Byte block is determined by the CAN data-
memory assignment bit (CMA) in the memory control register (MCON; C6h).
Table 10. Internal MOVX SRAM Configuration
IDM1
IDM0
CMA
8kB BLOCK
(MAC/MOVX DATA)
1kB BLOCK
(STACK/MOVX DATA)
256-BYTE
(CAN DATA MEMORY)
0
00E000h–00FFFFh
00DC00h–00DFFFh
00DB00h–00DBFFh
0
1
00E000h–00FFFFh
00DC00h–00DFFFh
FFDB00h–FFDBFFh
0
1
0
000000h–001FFFh
002000h–0023FFh
00DB00h–00DBFFh
0
1
000000h–001FFFh
002000h–0023FFh
FFDB00h–FFDBFFh
1
0
FFE000h–FFFFFFh
FFDC00h–FFDFFFh
00DB00h–00DBFFh
1
0
1
FFE000h–FFFFFFh
FFDC00h–FFDFFFh
FFDB00h–FFDBFFh
Extended Stack Pointer
The DS80C400 supports both the traditional 8-bit and an extended 10-bit stack pointer that improves the
performance of large programs written in high-level languages such as C. To enable the 10-bit stack pointer, set
the stack-address mode bit, SA (ACON.2). The bit is cleared following a reset, forcing the device to use an 8-bit
stack located in the scratchpad RAM area. When the SA bit is set, the device addresses up to 1kB of internal
MOVX memory for stack purposes. The 10-bit stack pointer address is generated by concatenating the lower two
bits of the extended stack pointer (ESP;9Bh) and the traditional 8051 stack pointer (SP;81h).
On-Chip Arithmetic Accelerator
An on-chip math accelerator allows the microcontroller to perform 32-bit and 16-bit multiplication, division, shifting,
and normalization using dedicated hardware. Math operations are performed by sequentially loading three special
registers. The mathematical operation is determined by the sequence in which three dedicated SFRs (MA, MB, and
MCNT0) are accessed, eliminating the need for a special step to choose the operation. The normalize function
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS80C400-FNY+ | 功能描述:8位微控制器 -MCU Network MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| DS80C400-KIT | 功能描述:EVAL KIT FOR DS80C400 RoHS:否 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:- 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| DS80C400-KIT# | 功能描述:开发板和工具包 - 8051 RoHS:否 制造商:Silicon Labs 产品:Development Kits 工具用于评估:C8051F960, Si7005 核心: 接口类型:USB 工作电源电压: |
| DS80C410 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Network Microcontrollers with Ethernet and CAN |
| DS80C410_09 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Network Microcontrollers with Ethernet and CAN |
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