参数资料
型号: E28F200BX-T120
厂商: INTEL CORP
元件分类: PROM
英文描述: 2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY
中文描述: 128K X 16 FLASH 12V PROM, 120 ns, PDSO56
封装: 20 X 14 MM, TSOP-56
文件页数: 40/48页
文件大小: 453K
代理商: E28F200BX-T120
28F200BX-TB 28F002BX-TB
EXTENDED TEMPERATURE OPERATION
AC CHARACTERISTICS FOR CE -CONTROLLED WRITE OPERATIONS(1 9)
Versions
T28F200BX-80(10)
Unit
T28F002BX-80(10)
Symbol
Parameter
Notes
Min
Max
tAVAV
tWC
Write Cycle Time
80
ns
tPHEL
tPS
RP
High Recovery
220
ns
to CE
Going Low
tWLEL
tWS
WE
Setup to CE
0ns
Going Low
tPHHEH
tPHS
RP
VHH Setup to
6 8
100
ns
CE
Going High
tVPEH
tVPS
VPP Setup to CE
5 8
100
ns
Going High
tAVEH
tAS
Address Setup to
3
60
ns
CE
Going High
tDVEH
tDS
Data Setup to CE
460
ns
Going High
tELEH
tCP
CE
Pulse Width
60
ns
tEHDX
tDH
Data Hold from
4
0
ns
CE
High
tEHAX
tAH
Address Hold
3
10
ns
from CE
High
tEHWH
tWH
WE
Hold from CE
High
10
ns
tEHEL
tCPH
CE
Pulse
20
ns
Width High
tEHQV1
Duration of WordByte
2 5
7
m
s
Programming
Operation
tEHQV2
Duration of Erase
2 5 6
04
s
Operation (Boot)
tEHQV3
Duration of Erase
2 5
04
s
Operation (Parameter)
tEHQV4
Duration of Erase
2 5
07
s
Operation (Main)
tQVVL
tVPH
VPP Hold from
5 8
0
ns
Valid SRD
tQVPH
tPHH
RP
VHH Hold
6 8
0
ns
from Valid SRD
tPHBR
Boot-Block Relock Delay
7
100
ns
tIR
Input Rise Time
10
ns
tIF
Input Fall Time
10
ns
NOTES
1 Ship-Enable Controlled Writes Write operations are driven by the valid combination of CE
and WE
in systems where
CE
defines the write pulse-width (within a longer WE
timing waveform) all set-up hold and inactive WE
time should
be measured relative to the CE
waveform
2 3 4 5 6 7 8 Refer to AC Characteristics for WE -Controlled Write Operations
9 Read timing characteristics during write and erase operations are the same as during read-only operations Refer to AC
Characteristics during Read Mode
10 See Standard Test Configuration
45
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