参数资料
型号: FDMS7620S
厂商: Fairchild Semiconductor
文件页数: 5/12页
文件大小: 0K
描述: MOSFET N-CH 30V DUAL POWER56
标准包装: 3,000
系列: PowerTrench®
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 10.1A
开态Rds(最大)@ Id, Vgs @ 25° C: 20 毫欧 @ 10.1A
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 11nC @ 10V
输入电容 (Ciss) @ Vds: 608pF @ 15V
功率 - 最大: 2.2W
安装类型: 表面贴装
封装/外壳: 8-PowerWDFN
供应商设备封装: Power56
包装: *
Typical Characteristics (Q1 N-Channel) T J = 25°C unless otherwise noted
10
8
I D = 10.1 A
1000
C iss
V DD = 10 V
6
4
V DD = 15 V
V DD = 20 V
100
C oss
C rss
2
f = 1 MHz
V GS = 0 V
0
0
2
4
6
8
10
0.1
1
10
30
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
20
50
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
10
T J = 25 o C
10
100 μ s
R θ JA = 125 C/W
T A = 25 C
T J = 125 o C
T J = 100 o C
1
0.1
THIS AREA IS
LIMITED BY r DS ( on )
SINGLE PULSE
T J = MAX RATED
o
o
1 ms
10 ms
100 ms
1s
10s
DC
1
0.001
0.01
0.1
1
10
0.01
0.01
0.1
1
10
100200
t AV , TIME IN AVALANCHE (ms)
Figure 9. Unclamped Inductive
Switching Capability
V DS , DRAIN to SOURCE VOLTAGE (V)
Figure 10. Forward Bias Safe
Operating Area
1000
SINGLE PULSE
R θ JA = 125 C/W
100
10
1
o
10
10
10
10
0.1
-4
-3
-2
-1
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
?2011 Fairchild Semiconductor Corporation
FDMS7620S Rev.C1
5
www.fairchildsemi.com
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