参数资料
型号: HSP50415VIZ
厂商: Intersil
文件页数: 25/29页
文件大小: 0K
描述: IC MODULATOR PROGRAMABLE 100MQFP
标准包装: 66
功能: 调制器
封装/外壳: 100-BQFP
包装: 托盘
HSP50415
TABLE 30. SOFT RESET SIGNAL
ADDRESS = 10 H
BIT NO.
NA
BIT NO.
19
BIT NO.
NA
DESCRIPTION
Writing to uPI address space 4 with CDATA<7:0> = 0x10 forces the internal soft Reset signal active. The
soft Reset stays active until different CDATA<7:0> other than 0x10 is written to address space 4.
TABLE 31. SHAPING FIR ROUNDING AND BALANCE
ADDRESS = 11 H
DESCRIPTION
I/Q FIR preLoad<18:0> filter seed value.
TABLE 32. FIFO DATA WRITE STROBE
ADDRESS = 12 H
DESCRIPTION
Strobe used to enable writes to FIFO - data from DIN<15:0.>, ISTRB interface.
RESET STATE
0
RESET STATE
0
RESET STATE
0
Power Consumption
The HSP50415 power consumption is as shown in
Figure 21.
1250
Evaluation Kit
The HSP50415EVAL1 is an evaluation kit for the HSP50415
wideband programmable modulator. The kit consists of an
evaluation Circuit Card Assembly complete with the
HSP50415 device and additional circuitry to provide for
1200
1150
1100
1050
1000
950
900
850
800
750
V DD = 3.3V DC
WORST CASE
SHAPING FILTER OFF
HALF BAND OFF
INTERPOLATION OFF
control via a computer parallel port. Windows based
demonstration software is provided for full user
programmability and control of all HSP50415 operational
modes. Documentation includes a user ’s manual, full
evaluation board schematics and PCB layout materials.
700
50
55
60
65
70
75
80
85
90
95
100
CLK FREQUENCY (MHz)
FIGURE 21. POWER CONSUMPTION vs CLK FREQUENCY
25
FN4559.6
April 23, 2007
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