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参数资料
| 型号： | HSP50415VIZ |
| 厂商： | Intersil |
| 文件页数： | 8/29页 |
| 文件大小： | 0K |
| 描述： | IC MODULATOR PROGRAMABLE 100MQFP |
| 标准包装： | 66 |
| 功能： | 调制器 |
| 封装/外壳： | 100-BQFP |
| 包装： | 托盘 |
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HSP50415
NCO divider<13:0>
REFCLK divider<7:0>
REFCLK
8-BIT
COUNTER
14-BIT
COUNTER
carryOut
SYMBOL NCO
TC
14-bit countValue
8 upper bits of phaseAccum
FIFOFreqError<8*7,7:0>
CLK
SYNC
enable
R
R
freqError<15:0>
_
phaseError<21:0>
FIGURE 2. PHASE/FREQUENCY ERROR DETECTOR
frequencyGain
freqError<15:0>
UL<31:0>
LL<13:0>
lagGain
phaseError<21:0>
41
/
LIMITER
R
R
DPLL
PhincError<31:0>
leadGain
FIGURE 3. DPLL LOOP FILTER
positive lockedValue
negative notLockedValue
lockIntegrator<8>
LOCKDET
threshold<20:0>
phaseErrorMag<20:0>
analogPLLlockStatus
_
carryOut
AO
A1
Z
AO
A1
S
Z
R
lockIntegrator<8:0>
useAPLLlockStatus
S
bit=1 indicates phaseErr > thld so NOT
locked
FIGURE 4. LOCK DETECTION BLOCK DIAGRAM
The Lock Detector compares the magnitude of the
phaseError to a programmable 21-bit threshold value. If the
TABLE 2. LOCK INTEGRATOR ADDENDS
carry out from this comparison is “1” then the phaseError is
greater than or equal to the threshold value and a negative
value is added to the lock integrator. If the carry out is “0”
then the phaseError is less than the threshold and a positive
value is added. As the phaseError magnitude stays below
the threshold level the lock integrator will grow from a
negative number to a positive one thus indicating a locked
condition. The lock integrator resets to a full-scale negative
value. The sign bit of the lock integrator is output as the
LOCK FACTOR
0xx
1xx
x00
x01
x10
x11
CARRY OUT
1
1
0
0
0
0
ADDEND
-0.5
-0.25
+0.0625
+0.1250
+0.2500
+0.5000
BINARY VALUE
111111000
111111100
000000001
000000010
000000100
000001000
LOCKDET status flag. The values added or subtracted to the
lock integrator are user selectable as follows in Table 2.
8
FN4559.6
April 23, 2007
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相关代理商/技术参数 |
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| HSP50SA8 | 制造商:RDI 功能描述:SPEAKER 2 ROUND 8 OHMS CLEAR FACE |
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