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| 型号： | HW-V4SX35-VIDEO-SK-EC |
| 厂商： | Xilinx Inc |
| 文件页数： | 77/112页 |
| 文件大小： | 0K |
| 描述： | VIRTEX-4 VIDEO STARTER KIT |
| 产品变化通告： | Development Systems Discontinuation 12/Jan/2009 |
| 标准包装： | 1 |
| 系列： | Virtex®-4 |
| 类型： | DSP FPGA |
| 适用于相关产品： | Virtex?-4 SX |
| 所含物品： | 开发平台，子板，电源，闪存卡，CMOS 图像传感器和软件 |
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R
VIO Design
Bitstream mode modifies the design to use local memorie s. Local memories are used because
a processor is not used in this type of design. As a result, the memory map interface is not
needed.
Input Type
The Input Type field of the VIO mask is used to specify the input that will be initialized at
start up. The user can select from a Test Pattern (4:4:4 RGB mode), the LVDS Camera (4:4:4
Bayer format), the Component input set to 525P format (4:4:4 RGB), the Composite input
(4:4:4 YCrCb), and the S-Video input (4:4:4 YCrCb).
A User Defined option allows the user to select if they plan to make changes directly to the
initialization fields of the various registers and memories. The User Defined option keeps
the mask from overwriting the edits the user has made.
Note: When using the User Defined option, both the Input Type and the Output Type must be set to
User Defined.
Output Type
The Output Type field of the VIO mask is used to specify the output that will be initialized
at start up. The user can select from VGA output (4:4:4 RGB mode), DVI output (4:4:4
RGB), Component output set to 525P (Progressive Scan or High Definitions formats) (4:4:4
YCrCb), Composite output (4:4:4 YCrCb), and the S-Video input (4:4:4 YCrCb).
A User Defined option allows the user to select if they plan to make changes directly to the
initialization fields of the various registers and memories. The User Defined option keeps
the mask from overwriting the edits the user has made.
Note: When using the User Defined option, both the Input Type and the Output Type must be set to
User Defined.
Mask Modifications
The script for the VIO mask is unlocked so that the user has the option to modify the
input/output settings or add new input/output options to meet their needs. It is highly
recommended that the user only modify the variable initializations at the top of the script.
The script can by found by right clicking on the vio if block and selecting Edit Mask. In the
Mask editor window, select the Initialization tab. The Initialization commands window
contains the script for the mask.
EDK Pcore
The VIO block can be used in a design that is targeted at being exported as an EDK pcore.
with EDK.
It is also possible to copy the VIO block in to a larger design that is to be exported as a
pcore. The VIO contains input and output gateways that are expected to be connected to
external pins in the EDK project. The user is responsible for resolving all of those issues.
The VSK Diagnostics EDK design can be use as a reference.
The user is responsible for making sure that the Compile Type of the VIO mask is set to
EDK before the pcore is generated. The user is also responsible for making sure that the
memory map was properly generated in the EDK Processor block.
Video Starter Kit
UG217 (v1.5) October 26, 2006
77
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| HW-V4SX35-VIDEO-SK-UK | 功能描述:VIRTEX-4 VIDEO STARTER KIT RoHS:否 类别:编程器，开发系统 >> 过时/停产零件编号 系列:Virtex®-4 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| HW-V5GBE-DK-UNI-G | 功能描述:KIT DEV V5 LXT GIGABIT ETHERNET RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Virtex®-5 LXT 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| HW-V5GBE-DK-UNI-G-J | 功能描述:KIT DEV GIGABIT ETHERNET VIRTEX5 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Virtex®-5 LXT 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| HW-V5GBE-DK-UNI-G-PROMO1 | 功能描述:KIT DEV V5 LXT GIGABIT ETHERNET RoHS:是 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| HW-V5GBE-DK-UNI-G-PROMO2 | 功能描述:KIT DEV V5 LXT GIGABIT ETHERNET RoHS:是 类别:编程器，开发系统 >> 过时/停产零件编号 系列:Virtex® 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
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